4.6 Article

A Novel 3D Chaotic System With Line Equilibrium: Multistability, Integral Sliding Mode Control, Electronic Circuit, FPGA Implementation and Its Image Encryption

Journal

IEEE ACCESS
Volume 10, Issue -, Pages 68057-68074

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/ACCESS.2022.3181424

Keywords

Chaotic communication; Encryption; Mathematical models; Bifurcation; Integrated circuit modeling; Sliding mode control; Field programmable gate arrays; Chaotic system; hidden attractors; ISMC; electronic circuit; FPGA; image encryption

Funding

  1. Center of Excellence in Theoretical and Computational Science (TaCS-CoE), King Mongkut's University of Technology Thonburi (KMUTT), Thailand
  2. National Research Council of Thailand (NRCT) [N41A640089]
  3. Postdoctoral Fellowship from KMUTT

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This paper presents a new three-dimensional chaotic system with line equilibrium and discusses its dynamic properties. It also proposes new synchronization results based on integral sliding mode control and demonstrates the implementation of the chaotic system using an electronic circuit and FPGA. Furthermore, an image encryption algorithm is proposed and its effectiveness is validated through experiments.
This paper announces a novel three-dimensional chaotic system with line equilibrium and discusses its dynamic properties such as Lyapunov exponents, phase portraits, equilibrium points, bifurcation diagram, multistability and coexisting attractors. New synchronization results based on integral sliding mode control (ISMC) are also derived for the new chaotic system with line equilibrium. In addition, an electronic circuit implementation of the new chaotic system with line equilibrium is reported and a good qualitative agreement is exhibited between the MATLAB simulations of the theoretical model and the MultiSim results. We also display the implementation of the Field-Programmable Gate Array (FPGA) based Pseudo-Random Number Generator (PRNG) by using the new chaotic system. The throughput of the proposed FPGA based new chaotic PRNG is 462.731 Mbps. Randomness analysis of the generated numbers has been performed with respect to the NIST-800-22 tests and they have successfully passed all of the tests. Finally, an image encryption algorithm based on the pixel-level scrambling, bit-level scrambling, and pixel value diffusion is proposed. The experimental results show that the encryption algorithm not only shuffles the pixel positions of the image, but also replaces the pixel values with different values, which can effectively resist various attacks such as brute force attack and differential attack.

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