Forming mechanism and growth of Kirkendall voids of Sn/Cu joints for electronic packaging: A recent review

For the common Cu-Sn interconnection system in microelectronics packaging, a significant concern is the spo-radic interfacial void formation within the Cu-Sn interface and intermetallic compound (IMC) layer during the service. The existence of these voids affects the electrical and mechanical properties of the joint and thus de-teriorates reliability. Most scholars simply attribute the Kirkendall voids problem to the Kirkendall effect caused by the difference in Cu/Sn inter-diffusion coefficients. However, Kirkendall voids are formed for a combination of many reasons. The plating additives, current density, surface roughness, coating thickness, and substrate types affect the formation of Kirkendall voids. We believe that among the many factors affecting the formation of voids, the unbalanced diffusion of elements (Kirkendall effect) is the root cause, and impurities and Cu microstructure are the dominant factors. The addition of alloying elements to the solder affects the formation of voids by changing the unbalanced diffusion of elements. This paper releases the possible mechanism of Kirkendall voids and gives the perspective summary from three steps of void formation, and the available suppression method is given based on the final solution.

Automated summary

This paper discusses the issue of interfacial void formation in the Cu-Sn interconnection system in microelectronics packaging. The existence of voids has a negative impact on the performance and reliability of the joint. The study found that there are multiple factors affecting void formation, with unbalanced diffusion of elements and impurities being the main factors. The addition of alloying elements to the solder can alter the diffusion effects of elements, thus affecting void formation.