4.6 Article

Influence of Spacer Thickness on the Noise Performance in InP HEMTs for Cryogenic LNAs

Journal

IEEE ELECTRON DEVICE LETTERS
Volume 43, Issue 7, Pages 1029-1032

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/LED.2022.3178613

Keywords

MODFETs; HEMTs; Indium phosphide; III-V semiconductor materials; Cryogenics; Logic gates; Epitaxial growth; Cryogenic; InP HEMT; low-noise amplifier; noise; spacer thickness

Funding

  1. Vinnova in Eurostars [E!113415 CRYONOISE]

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In this study, InP HEMTs with different spacer thicknesses (1 to 7 nm) were fabricated and characterized. The electrical dc and rf properties of the InP HEMTs were evaluated at 5 K. The lowest average noise temperature was achieved by the InP HEMTs with a 5 nm spacer thickness in the 4-8 GHz frequency range. The spacer thickness was found to influence the noise performance of the InP HEMTs by controlling the real-space transfer of electrons.
InP high electron mobility transistors (InP HEMTs) with different spacer thickness 1 to 7 nm in the InAlAs-InGaAs heterostructure have been fabricated and characterized at 5 K with respect to electrical dc and rf properties. The InP HEMT noise performance was extracted from gain and noise measurements of a hybrid low-noise amplifier (LNA) at 5 K equipped with discrete transistors. When biased for optimal noise operation, the LNA using 5 nm spacer thickness InP HEMTs achieved the lowest average noise temperature of 1.4 K at 4-8 GHz. The InP HEMT channel noise was estimated from the drain noise temperature which confirmed the minimum in noise temperature for the 5 nm spacer thickness InP HEMT. It is suggested that the spacer thickness acts to control the degree of real-space transfer of electrons from the channel to the barrier responsible for the observed noise variation in the cryogenic InP HEMTs.

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