Journal
IEEE ACCESS
Volume 10, Issue -, Pages 68724-68730Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/ACCESS.2022.3183593
Keywords
Atomic layer deposition; carrier lifetime; CMOS image sensor; surface passivation; forming gas; HfO2; interface trap density
Categories
Funding
- Korean Government (MOTIE)
- Korea Evaluation Institute of Industrial Technology (KEIT) [20010574]
- Korea Evaluation Institute of Industrial Technology (KEIT) [20010574] Funding Source: Korea Institute of Science & Technology Information (KISTI), National Science & Technology Information Service (NTIS)
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The surface passivation of a CMOS image sensor plays a crucial role in improving the overall device performance. In this study, thermal atomic layer deposition (T-ALD) and plasma enhanced (PE-ALD) techniques were employed to deposit HfO2 and Al2O3 thin films. The analysis of metal-oxide-semiconductor structures showed that the Al2O3/HfO2 bilayer structure exhibited superior performance, with low interface trap density and high minority carrier lifetime. Vacuum annealing and forming gas annealing treatments further improved the device performance.
The surface passivation of a CMOS image sensor (CIS) is highly beneficial for the overall improvement of a device performance. We employed the thermal atomic layer deposition (T-ALD) and plasma enhanced (PE-ALD) techniques for the deposition of 20 nm HfO2 as well as stacked with 3 and 5 nm Al2O3 thin films. The HfO2/Si and Al2O3/HfO2/Si metal-oxide-semiconductor structures were used to analyze the fixed charge density (Q(f)) and interface trap density (D-it). The as-synthesized samples show high D-it and Q(f) values (10(12) cm(-2)eV(-1)) and a minority carrier lifetime of 15-300 mu s. The finite-difference time-domain simulation of high-k dielectrics confirmed that the Al2O3 (top)/HfO2 stacked structures expected higher quantum efficiency for CIS application. The effect of vacuum annealing (VA) and forming gas annealing (FGA) treatments succeeded with the decomposition of the Dit and increase in carrier lifetime. The H-2 ambient FGA samples showed a remarkable decrease in the D-it values. To improve the overall performance of the device after passivation, we employed an Al2O3/HfO2 bilayer structure, which showed a low D-it of 10(11) cm(-2)eV(-1) and a minority carrier lifetime of similar to 3,700 mu s after 400 degrees C and 30 min FGA. We believe that this surface passivation strategy will pave way for future CIS technology regarding the development of lower defective surface and superior performance.
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