Related references
Note: Only part of the references are listed.ARENA: Asynchronous Reconfigurable Accelerator Ring to Enable Data-Centric Parallel Computing
Cheng Tan et al.
IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS (2021)
A Comprehensive Survey on Graph Neural Networks
Zonghan Wu et al.
IEEE TRANSACTIONS ON NEURAL NETWORKS AND LEARNING SYSTEMS (2021)
HiMap: Fast and Scalable High-Quality Mapping on CGRA via Hierarchical Abstraction
Dhananiaya Wijerathne et al.
PROCEEDINGS OF THE 2021 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE 2021) (2021)
OpenCGRA: Democratizing Coarse-Grained Reconfigurable Arrays
Cheng Tan et al.
2021 IEEE 32ND INTERNATIONAL CONFERENCE ON APPLICATION-SPECIFIC SYSTEMS, ARCHITECTURES AND PROCESSORS (ASAP 2021) (2021)
Ultra-Elastic CGRAs for Irregular Loop Specialization
Christopher Torng et al.
2021 27TH IEEE INTERNATIONAL SYMPOSIUM ON HIGH-PERFORMANCE COMPUTER ARCHITECTURE (HPCA 2021) (2021)
Domain-Specific Hardware Accelerators
William J. Dally et al.
COMMUNICATIONS OF THE ACM (2020)
There's plenty of room at the Top: What will drive computer performance after Moore's law?
Charles E. Leiserson et al.
SCIENCE (2020)
Accurate Operation Delay Prediction for FPGA HLS Using Graph Neural Networks
Ecenur Ustun et al.
2020 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER AIDED-DESIGN (ICCAD) (2020)
DSAGEN: Synthesizing Programmable Spatial Accelerators
Jian Weng et al.
2020 ACM/IEEE 47TH ANNUAL INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE (ISCA 2020) (2020)
An Energy-Efficient Integrated Programmable Array Accelerator and Compilation Flow for Near-Sensor Ultralow Power Processing
Satyajit Das et al.
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS (2019)
A New Golden Age for Computer Architecture
John L. Hennessy et al.
COMMUNICATIONS OF THE ACM (2019)
CASCADE: High Throughput Data Streaming via Decoupled Access-Execute CGRA
Dhananjaya Wijerathne et al.
ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS (2019)
Data-Flow Graph Mapping Optimization for CGRA With Deep Reinforcement Learning
Dajiang Liu et al.
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS (2019)
HyCUBE: A 0.9V 26.4 MOPS/mW, 290 pJ/op, Power Efficient Accelerator for IoT Applications
Bo Wang et al.
2019 IEEE ASIAN SOLID-STATE CIRCUITS CONFERENCE (A-SSCC) (2019)
Scalable Interconnects for Reconfigurable Spatial Architectures
Yaqi Zhang et al.
PROCEEDINGS OF THE 2019 46TH INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE (ISCA '19) (2019)
PolySA: Polyhedral-Based Systolic Array Auto-Compilation
Jason Cong et al.
2018 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN (ICCAD) DIGEST OF TECHNICAL PAPERS (2018)
Hybrid Optimization/Heuristic Instruction Scheduling for Programmable Accelerator Codesign
Tony Nowatzki et al.
27TH INTERNATIONAL CONFERENCE ON PARALLEL ARCHITECTURES AND COMPILATION TECHNIQUES (PACT 2018) (2018)
Eyeriss: An Energy-Efficient Reconfigurable Accelerator for Deep Convolutional Neural Networks
Yu-Hsin Chen et al.
IEEE JOURNAL OF SOLID-STATE CIRCUITS (2017)
Plasticine: A Reconfigurable Architecture For Parallel Patterns
Raghu Prabhakar et al.
44TH ANNUAL INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE (ISCA 2017) (2017)
HyCUBE: A CGRA with Reconfigurable Single-cycle Multi-hop Interconnect
Manupa Karunaratne et al.
PROCEEDINGS OF THE 2017 54TH ACM/EDAC/IEEE DESIGN AUTOMATION CONFERENCE (DAC) (2017)
End-to-end Deep Learning of Optimization Heuristics
Chris Cummins et al.
2017 26TH INTERNATIONAL CONFERENCE ON PARALLEL ARCHITECTURES AND COMPILATION TECHNIQUES (PACT) (2017)
In-Datacenter Performance Analysis of a Tensor Processing Unit
Norman P. Jouppi et al.
44TH ANNUAL INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE (ISCA 2017) (2017)
Efficient Control and Communication Paradigms for Coarse-Grained Spatial Architectures
Michael Pellauer et al.
ACM TRANSACTIONS ON COMPUTER SYSTEMS (2015)
Graph Minor Approach for Application Mapping on CGRAs
Liang Chen et al.
ACM TRANSACTIONS ON RECONFIGURABLE TECHNOLOGY AND SYSTEMS (2014)
DYSER: UNIFYING FUNCTIONALITY AND PARALLELISM SPECIALIZATION FOR ENERGY-EFFICIENT COMPUTING
Venkatraman Govindaraju et al.
IEEE MICRO (2012)
Share Paper
