Journal
ACS APPLIED ELECTRONIC MATERIALS
Volume 4, Issue 9, Pages 4482-4489Publisher
AMER CHEMICAL SOC
DOI: 10.1021/acsaelm.2c00733
Keywords
Ge/SiGe; quantum well; oxide-semiconductor; interface; cryogenic; transport
Funding
- Laboratory Directed Research and Development Program at Sandia National Laboratories (SNL)
- U.S. DOE National Nuclear Security Administration [DE-NA0003525]
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Hole spins in Ge quantum wells have shown success in spintronic and quantum applications. This study analyzed and characterized the material and devices of commercially grown Ge/SiGe quantum well heterostructures. The results confirmed the high quality of the material and demonstrated a high mobility hole gas. The study also investigated the use of surface preparations to control barrier thickness, density, mobility, and interface trap density.
Hole spins in Ge quantum wells have shown success in both spintronic and quantum applications, thereby increasing the demand for high-quality material. We performed material analysis and device characterization of commercially grown shallow and undoped Ge/SiGe quantum well heterostructures on 8-in. (100) Si wafers. Material analysis reveals the high crystalline quality, sharp interfaces, and uniformity of the material. We demonstrate a high mobility (1.7 x 105 cm(2) V-1 s(-1)) 2D hole gas in a device with a conduction threshold density of 9.2 x 10(10) cm(-2). We study the use of surface preparation as a tool to control barrier thickness, density, mobility, and interface trap density. We report interface trap densities of 6 x 1012 eV-1. Our results validate the material's high quality and show that further investigation into improving device performance is needed. We conclude that surface preparations which include weak Ge etchants, such as dilute H2O2, can be used for postgrowth control of quantum well depth in Ge-rich SiGe while still providing a relatively smooth oxide-semiconductor interface. Our results show that interface state density is mostly independent of our surface preparations, thereby implying that a Si cap layer is not necessary for device performance. Transport in our devices is instead limited by the quantum well depth. Commercially sourced Ge/SiGe, such as studied here, will provide accessibility for future investigations.
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