A Novel Fault-Tolerant Logic Style with Self-Checking Capability

Article Computer Science, Information Systems

Nwise and Pwise: 10T Radiation Hardened SRAM Cells for Space Applications With High Reliability Requirements

Azam Seyedi et al.

Summary: In this paper, the authors propose two highly reliable radiation hardened SRAM cells, the Nwise cell and the Pwise cell, designed with 28nm FD-SOI technology. Through comprehensive simulations, it is shown that both cells are competitive options for space applications, with high tolerance to Single Event Upsets (SEU) and Multi Event Upsets (MEU).

IEEE ACCESS (2022)

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Article Computer Science, Hardware & Architecture

Strengthened 32-bit AES implementation: Architectural error correction configuration with a new voting scheme

Saeideh Sheikhpur et al.

Summary: A low-cost fault resilient architecture for AES is proposed to ensure reliability, security, and privacy in communication. Through the introduction of a novel voting scheme and the development of a reliable and secure 32-bit data-path AES implementation, the architecture achieves fault tolerance for multiple-bit faults.

IET COMPUTERS AND DIGITAL TECHNIQUES (2021)

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Article Multidisciplinary Sciences

Hybrid and Double Modular Redundancy (DMR)-Based Fault-Tolerant Carry Look-Ahead Adder Design

Ghashmi H. BinTalib et al.

Summary: The paper presents different fault-tolerant carry look-ahead adder designs against single-bit soft errors based on double modular redundancy DMR and hybrid fault-tolerant schemes. These designs combine partial hardware redundancy and protected C-element, or partial hardware redundancy and parity prediction scheme, to improve fault tolerance capability while reducing area overhead. The proposed voter circuits help achieve higher fault masking rate and lower area overhead compared to existing approaches.

ARABIAN JOURNAL FOR SCIENCE AND ENGINEERING (2021)

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Proceedings Paper Engineering, Electrical & Electronic