A Novel Fault-Tolerant Logic Style with Self-Checking Capability

We introduce a novel logic style with self-checking capability to enhance hardware reliability at logic level. The proposed logic cells have two-rail inputs/outputs, and the functionality for each rail of outputs enables construction of fault-tolerant configurable circuits. The AND and OR gates consist of 8 transistors based on CNFET technology, while the proposed XOR gate benefits from both CNFET and low-power MGDI technologies in its transistor arrangement. To demonstrate the feasibility of our new logic gates, we used an AES S-box implementation as the use case. The extensive simulation results using HSPICE indicate that the case-study circuit using on proposed gates has superior speed and power consumption compared to other implementations with error-detection capability.

Automated summary

We propose a novel logic style with self-checking capability to enhance hardware reliability at the logic level. The logic cells introduced have two-rail inputs/outputs and enable the construction of fault-tolerant configurable circuits. Simulation results using HSPICE demonstrate that the case-study circuit utilizing the proposed gates outperforms other error-detection implementations in terms of speed and power consumption.