4.2 Article

LT-PIM: An LUT-Based Processing-in-DRAM Architecture With RowHammer Self-Tracking

Journal

IEEE COMPUTER ARCHITECTURE LETTERS
Volume 21, Issue 2, Pages 141-144

Publisher

IEEE COMPUTER SOC
DOI: 10.1109/LCA.2022.3220084

Keywords

Processing-in-memory; DRAM; look-up table; row hammer

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In this research, we propose LT-PIM, a Lookup Table-based Processing-In-Memory architecture that leverages the high density of DRAM for parallel and flexible computation. LT-PIM supports lookup table queries for complex arithmetic operations and enables bulk bit-wise in-memory logic. It also achieves a complete and inexpensive in-DRAM RowHammer self-tracking approach. Experimental results show that LT-PIM achieves significantly higher energy efficiency and energy-saving compared to other designs, making it a promising solution for memory processing.
Herein, we propose LT-PIM as a Lookup Table-based Processing-In-Memory architecture leveraging the high density of DRAM to enable massively parallel and flexible computation. LT-PIM supports lookup table queries to execute complex arithmetic operations, such as multiplication via only memory read operation. In addition, LT-PIM enables bulk bit-wise in-memory logic by elevating the analog operation of the DRAM sub-array to implement Boolean functions between operands in the same bit-line. With this, LT-PIM enables a complete and inexpensive in-DRAM RowHammer (RH) self-tracking approach. Our results demonstrate that LT-PIM achieves & SIM;70% higher energy efficiency than the fastest charge-sharing-based designs and & SIM;32% over the best LUT-based designs. As for the RH self-tracking, with a worst-case slowdown of & SIM;0.2%, LT-PIM archives up to & SIM;80% energy-saving over the best designs.

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