4.6 Article

A Second-Order NS Pipelined SAR ADC With Quantization-Prediction-Unrolled Gain Error Shaping and Fully Passive Integrator

Related references

Note: Only part of the references are listed.
Article Engineering, Electrical & Electronic

A 20 MHz Bandwidth 79 dB SNDR SAR-Assisted Noise-Shaping Pipeline ADC With Gain and Offset Calibrations

Yanbo Zhang et al.

Summary: This study introduces a SAR-assisted NS pipeline ADC with optimized NTF zeros and inter-stage gain, realizing NS in the second stage using an EF structure. The prototype ADC achieves high-speed operation with low power consumption and strong in-band noise suppression.

IEEE JOURNAL OF SOLID-STATE CIRCUITS (2022)

Article Engineering, Electrical & Electronic

An Inherent Gain Error Tolerance Noise-Shaping SAR-Assisted Pipeline ADC With Code-Counter-Based Offset Calibration

Hongshuai Zhang et al.

Summary: This article introduces an inherent gain error-tolerant noise-shaping SAR-assisted pipelined ADC, which utilizes a hybrid architecture with a pure passive-feedforward NS SAR ADC in the first stage. The architecture greatly relaxes the gain accuracy constraint in the conventional pipelined structure and introduces a code-counter-based background offset calibration to mitigate interstage offset.

IEEE JOURNAL OF SOLID-STATE CIRCUITS (2022)

Article Engineering, Electrical & Electronic

A 77.1-dB-SNDR 6.25-MHz-BW Pipeline SAR ADC With Enhanced Interstage Gain Error Shaping and Quantization Noise Shaping

Chen-Kai Hsu et al.

Summary: This article presents an enhanced interstage gain error shaping (GES) technique that adopts a digital error feedback (DEF) method to address the truncation error in the prior implementation. It also proposes a first-order passive quantization noise shaping (NS) technique to reduce the input-pair ratio of the two-input-pair comparator.

IEEE JOURNAL OF SOLID-STATE CIRCUITS (2021)

Article Engineering, Electrical & Electronic

A 40-MHz Bandwidth 75-dB SNDR Partial-Interleaving SAR-Assisted Noise-Shaping Pipeline ADC

Yan Song et al.

Summary: This article introduces a SAR-assisted NS ADC incorporating various techniques to improve performance, such as using a dynamic amplifier for residue amplification and error feedback to achieve 1st-order NS. Additionally, an extra residue feed-forward path is introduced to compensate for NTF deterioration caused by gain mismatch.

IEEE JOURNAL OF SOLID-STATE CIRCUITS (2021)

Article Engineering, Electrical & Electronic

A 12.5-MHz Bandwidth 77-dB SNDR SAR-Assisted Noise Shaping Pipeline ADC

Yan Song et al.

IEEE JOURNAL OF SOLID-STATE CIRCUITS (2020)

Article Engineering, Electrical & Electronic

A Temperature-Stabilized Single-Channel 1-GS/s 60-dB SNDR SAR-Assisted Pipelined ADC With Dynamic Gm-R-Based Amplifier

Wenning Jiang et al.

IEEE JOURNAL OF SOLID-STATE CIRCUITS (2020)

Article Engineering, Electrical & Electronic

A Pipeline SAR ADC With Second-Order Interstage Gain Error Shaping

Chen-Kai Hsu et al.

IEEE JOURNAL OF SOLID-STATE CIRCUITS (2020)

Article Engineering, Electrical & Electronic

An Energy-Efficient Comparator With Dynamic Floating Inverter Amplifier

Xiyuan Tang et al.

IEEE JOURNAL OF SOLID-STATE CIRCUITS (2020)

Article Engineering, Electrical & Electronic

A Calibration-Free 14-b 0.7-mW 100-MS/s Pipelined-SAR ADC Using a Weighted- Averaging Correlated Level Shifting Technique

Jia-Ching Wang et al.

IEEE JOURNAL OF SOLID-STATE CIRCUITS (2020)

Article Engineering, Electrical & Electronic

A Configurable Noise-Shaping Band-Pass SAR ADC With Two-Stage Clock-Controlled Amplifier

Zihao Jiao et al.

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS (2020)

Article Engineering, Electrical & Electronic

A 0.029-mm2 17-fJ/Conversion-Step Third-Order CT ΔΣ ADC With a Single OTA and Second-Order Noise-Shaping SAR Quantizer

Jiaxin Liu et al.

IEEE JOURNAL OF SOLID-STATE CIRCUITS (2019)

Article Engineering, Electrical & Electronic

A Calibration-Free Time-Interleaved Fourth-Order Noise-Shaping SAR ADC

Lu Jie et al.

IEEE JOURNAL OF SOLID-STATE CIRCUITS (2019)

Article Engineering, Electrical & Electronic

A Capacitively Degenerated 100-dB Linear 20-150 MS/s Dynamic Amplifier

Md Shakil Akter et al.

IEEE JOURNAL OF SOLID-STATE CIRCUITS (2018)

Article Engineering, Electrical & Electronic

A 13-ENOB Second-Order Noise-Shaping SAR ADC Realizing Optimized NTF Zeros Using the Error-Feedback Structure

Shaolan Li et al.

IEEE JOURNAL OF SOLID-STATE CIRCUITS (2018)

Article Engineering, Electrical & Electronic

A 0.6-V 10-bit 200-kS/s SAR ADC With Higher Side-Reset-and-Set Switching Scheme and Hybrid CAP-MOS DAC

Hongshuai Zhang et al.

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS (2018)

Article Engineering, Electrical & Electronic

60-dB SNDR 100-MS/s SAR ADCs With Threshold Reconfigurable Reference Error Calibration

Chi-Hang Chan et al.

IEEE JOURNAL OF SOLID-STATE CIRCUITS (2017)

Article Engineering, Electrical & Electronic

A 90-MS/s 11-MHz-Bandwidth 62-dB SNDR Noise-Shaping SAR ADC

Jeffrey A. Fredenburg et al.

IEEE JOURNAL OF SOLID-STATE CIRCUITS (2012)

Article Engineering, Electrical & Electronic

A SAR-Assisted Two-Stage Pipeline ADC

Chun C. Lee et al.

IEEE JOURNAL OF SOLID-STATE CIRCUITS (2011)

Article Engineering, Electrical & Electronic

A 10-bit 50-MS/s SAR ADC With a Monotonic Capacitor Switching Procedure

Chun-Cheng Liu et al.

IEEE JOURNAL OF SOLID-STATE CIRCUITS (2010)

Article Engineering, Electrical & Electronic

A 10-bit 100-MS/s Reference-Free SAR ADC in 90 nm CMOS

Yan Zhu et al.

IEEE JOURNAL OF SOLID-STATE CIRCUITS (2010)