Bayesian Learning Automated SRAM Circuit Design for Power and Performance Optimization

Article Computer Science, Hardware & Architecture

Machine Learning-Based Read Access Yield Estimation and Design Optimization for High-Density SRAM

Taehwan Yoon et al.

Summary: This article presents an efficient yield estimation method for C-MPFP using Bayesian optimization to estimate PDF. The proposed method significantly reduces computational cost while maintaining accuracy. Experimental results show that the proposed method reduces simulation time by more than 20 times compared to BMC. Additionally, a BO-based design optimization method for static random-access memory read access is proposed, resulting in a 10% faster speed.

IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS (2023)

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Article Computer Science, Hardware & Architecture

An Automatic Circuit Design Framework for Level Shifter Circuits

Jiwoo Hong et al.

Summary: This study proposes an automatic circuit design framework that can generate practical circuit structures and optimize the size of each transistor to meet performance and reliability requirements. Experimental results show that the framework can produce novel circuit topologies and achieve better power-delay product (PDP) optimization compared to designs by human experts.

IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS (2022)

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Article Engineering, Electrical & Electronic

Variation-Aware SRAM Cell Optimization Using Deep Neural Network-Based Sensitivity Analysis

Hyunjeong Kwon et al.

Summary: This paper introduces a novel SRAM optimization method using deep neural networks to determine optimal design parameters, achieving maximization of mean stability and minimization of variance.

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS (2021)

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Proceedings Paper Automation & Control Systems

Automated Compensation Scheme Design for Operational Amplifier via Bayesian Optimization

Jialin Lu et al.

Summary: An automated compensation scheme design approach for operational amplifiers is proposed in this paper, which maps the behavioral-level description of the operational amplifier to an acyclic graph and transfer the compensation design problem into a topology optimization problem. A feature mapping method and a bi-level Bayesian optimization approach are proposed to efficiently solve the topology optimization problem. Experimental results demonstrate that the proposed method can obtain competitive three-stage operational amplifiers compared to manual designs.

2021 58TH ACM/IEEE DESIGN AUTOMATION CONFERENCE (DAC) (2021)

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Proceedings Paper Engineering, Electrical & Electronic

Bayesian Optimization Approach for Analog Circuit Design Using Multi-task Gaussian Process

Jiangli Huang et al.

Summary: In this paper, an efficient Bayesian optimization approach for analog circuit synthesis is proposed using a multi-task Gaussian process model. By extending the Gaussian process to a vector-valued function with a shared covariance function, the method learns dependencies between different circuit specifications. The experimental results demonstrate that the proposed method can reduce the number of simulations needed while achieving better optimization results.

2021 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS) (2021)

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Proceedings Paper Computer Science, Software Engineering