Related references
Note: Only part of the references are listed.A Mismatch Calibration Technique for SAR ADCs Based on Deterministic Self-Calibration and Stochastic Quantization
Mojtaba Bagheri et al.
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS (2020)
A 13-bit 3-MS/s Asynchronous SAR ADC with a Passive Resistor Based Loop Delay Circuit
Hyungyu Ju et al.
ELECTRONICS (2019)
A 16-bit 16-MS/s SAR ADC With On-Chip Calibration in 55-nm CMOS
Junhua Shen et al.
IEEE JOURNAL OF SOLID-STATE CIRCUITS (2018)
A 46 μW 13 b 6.4 MS/s SAR ADC With Background Mismatch and Offset Calibration
Ming Ding et al.
IEEE JOURNAL OF SOLID-STATE CIRCUITS (2017)
An Oversampling SAR ADC With DAC Mismatch Error Shaping Achieving 105 dB SFDR and 101 dB SNDR Over 1 kHz BW in 55 nm CMOS
Yun-Shiang Shu et al.
IEEE JOURNAL OF SOLID-STATE CIRCUITS (2016)
A 12-Bit 10 MS/s SAR ADC With High Linearity and Energy-Efficient Switching
Shubin Liu et al.
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS (2016)
Histogram-Based Ratio Mismatch Calibration for Bridge-DAC in 12-bit 120 MS/s SAR ADC
Yan Zhu et al.
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS (2016)
Histogram-based calibration of capacitor mismatch in SAR ADCs
Eric Swindlehurst et al.
ELECTRONICS LETTERS (2015)
A 12-bit 8.47-fJ/Conversion-Step Capacitor-Swapping SAR ADC in 110-nm CMOS
Yung-Hui Chung et al.
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS (2015)
A 100-nW 9.1-ENOB 20-kS/s SAR ADC for Portable Pulse Oximeter
Hokyu Lee et al.
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS (2015)
Digital foreground calibration of capacitor mismatch for SAR ADCs
In-june Yeo et al.
ELECTRONICS LETTERS (2014)
A 10b/12b 40 kS/s SAR ADC With Data-Driven Noise Reduction Achieving up to 10.1b ENOB at 2.2 fJ/Conversion-Step
Pieter Harpe et al.
IEEE JOURNAL OF SOLID-STATE CIRCUITS (2013)
A Digital-Domain Calibration of Split-Capacitor DAC for a Differential SAR ADC Without Additional Analog Circuits
Ji-Yong Um et al.
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS (2013)
A 1.7 mW 11b 250 MS/s 2-Times Interleaved Fully Dynamic Pipelined SAR ADC in 40 nm Digital CMOS
Bob Verbruggen et al.
IEEE JOURNAL OF SOLID-STATE CIRCUITS (2012)
A 26 μW 8 bit 10 MS/s Asynchronous SAR ADC for Low Energy Radios
Pieter J. A. Harpe et al.
IEEE JOURNAL OF SOLID-STATE CIRCUITS (2011)
A 10-bit 50-MS/s SAR ADC With a Monotonic Capacitor Switching Procedure
Chun-Cheng Liu et al.
IEEE JOURNAL OF SOLID-STATE CIRCUITS (2010)
Share Paper
