Journal
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
Volume -, Issue -, Pages -Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TCSI.2023.3320745
Keywords
DCR loss; current density; dual-path; hybrid topology; inductor current reduction; switched-capacitor
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This work proposes a high-step-down switched-capacitor hybrid DC-DC converter that effectively addresses the conduction loss in the inductor and power switches. The converter achieves superior performance in reducing the inductor DC current compared to existing converters, and enhances efficiency and on-chip power/current density. It is capable of regulating an output voltage within a certain range and accommodates different input voltages.
This work proposes a high-step-down switched-capacitor (SC) hybrid DC-DC converter that effectively addresses the conduction loss in the inductor and power switches. Specifically, an architecture combining a dual-path hybrid (DPH)converter at the input, and a continuous-current-input SC (CISC)stage at the output, achieves superior performance in reducing the inductor DC current (I-L,I-DC)compared to the existing single-inductor two-flying-capacitor (1L-2C(F))converters. Also, the converter exploits low-voltage (LV) switches to handle a substantial portion of the current, diminishing the reliance on the inductor or high-voltage (HV) switches. Consequently, this approach enhances the efficiency and on-chip power/current density. The converter, implemented in 180-nm BCD, integrates monolithic power switches, drivers, and control circuitry. It is capable of regulating an output voltage within the range of 1.2 to3.5 V, accommodating a 12 V/24 V-input. The peak efficiency is93% and the on-chip current density is 0.638A/mm(2). The load current delivery is up to 3 A, even using a compact inductor with a DC resistance (DCR) of 200 m Omega.
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