4.6 Article

Parallel Versus Serial: Design of an Optical Receiver With Integrated Blue Photodetectors and Digitally Tunable Low-End Cutoff Frequency for MicroLED-Based Parallel Interchip Communication

Journal

IEEE JOURNAL OF SOLID-STATE CIRCUITS
Volume -, Issue -, Pages -

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/JSSC.2023.3322044

Keywords

Blue; communication; cutoff; optical; parallel; photodetector; photodiode; receiver; serial; transimpedance amplifier (TIA)

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This article compares the energy efficiency of serial and parallel optical links and proposes a design of an optical receiver integrated with blue photodetectors. The design achieves high energy efficiency and compact analog front-end, paving the way for dense and energy efficient parallel links.
This article first analytically compares the energy efficiency of a serial optical link with a parallel link with the same data throughput and bit error rate for interchip communication. The analysis predicts that more than 10x energy efficiency improvement is feasible at both TX and RX in a parallel optical link compared to the fastest serial link, depending on the technology. Next, the article presents the design of an optical receiver integrated with on-chip blue photodetectors for the parallel interchip communication. The blue light allows using high-speed microLEDs and enables CMOS compatible photodetector structures that have extremely low capacitance per unit area. This along with a transimpedance-to-noise optimization approach results in a highly energy efficient and compact analog front-end for the receiver, paving the way for dense and energy efficient parallel links. Besides, a digital offset cancellation technique is proposed for offset compensation that can provide a low-end cutoff frequency down to a few hertz with a compact area. As a proof of concept, a 32 elements optical receiver array is fabricated in a low-cost 130 nm CMOS SOI process, with each element occupying only 50 x 50 mu m in area. Free space optical measurement results of a single receiver array element show a sensitivity of -19.3 dBm with a bit error rate of 10(-12) at a data rate of 2 Gbps and an energy efficiency of about 0.5 pJ/bit.

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