4.5 Article

Accelerating block lifecycle on blockchain via hardware transactional memory

Journal

Publisher

ACADEMIC PRESS INC ELSEVIER SCIENCE
DOI: 10.1016/j.jpdc.2023.104779

Keywords

Blockchain; Ethereum; Smart contract; Hardware transaction memory; Concurrent execution

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The processing of block lifecycles is crucial to the efficiency of a blockchain. The FASTBLOCK framework, which introduces fine-grained concurrency, accelerates the execution and validation steps. It outperforms state-of-the-art solutions significantly in terms of performance.
The processing of block lifecycles is essential to the efficiency of a blockchain, which consists of four steps: creation, execution, consensus, and validation. The permissionless blockchain systems typically had very limited transaction throughput because of the performance bottleneck of consensus protocols. With recent advances in consensus protocols, the execution and validation of transactions have become the new performance bottleneck. We propose a novel framework, called FASTBLOCK, to speed up the execution and validation steps by introducing fine-grained concurrency. Our early design of FASTBLOCK supported three key modules: (1) a symbolic execution -based analyzer that automatically identifies minimal atomic sections in each transaction; (2) a concurrent execution step that executes possibly conflicting transactions in parallel using hardware transactional memory; (3) a concurrent validation step that introduces a happen-before relation to deterministically re-execute transactions.The improved FASTBLOCK presented in this article supports the nonce mechanism to schedule concurrent transactions from the same account. Moreover, we empirically study the impact of concurrency on Ethereum except for performance and shed light on potential optimizations of FASTBLOCK. Finally, we implemented FASTBLOCK and then evaluated the performance of FASTBLOCK. Our result shows that the FASTBLOCK outperforms state-of-art solutions significantly in performance: the execution step and validation step speed up to 3.0x and 2.3x on average over the original serial model, respectively, with eight concurrent threads. In addition, we evaluated the impact of the nonce mechanism, and the result shows that the performance loss caused by this mechanism is acceptable in practice.

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