Journal
SOLAR ENERGY MATERIALS AND SOLAR CELLS
Volume 265, Issue -, Pages -Publisher
ELSEVIER
DOI: 10.1016/j.solmat.2023.112623
Keywords
Silicon heterojunction; Passivated contact; Contact resistivity; Metal/TCO interface; Activation energy; TCAD simulation
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Measuring specific contact resistivity (pc) is crucial for interface engineering in high efficiency solar cells. The Transfer Length Method (TLM) is commonly used for evaluating layer sheet resistance (Rsheet) and pc, but it is not suitable for metal/Transparent Conductive Oxide (TCO) interface evaluation in silicon heterojunction (SHJ) cells. This study investigates the parameters that restrict current confinement within the TCO, including mid-gap trap density (Dit) at the a-Si:H/c-Si interface and the activation energy (Ea = Ec - EF) variation of a-Si:H contact layers.
Measuring specific contact resistivity (pc) in test vehicles representative of the final solar cell is critical for interface engineering in high efficiency devices such as silicon heterojunction (SHJ) solar cell. The Transfer Length Method (TLM) is commonly used for layer sheet resistance (Rsheet) and pc evaluation and is valid for samples with charge transport confined in one conductive layer only. For metal/Transparent Conductive Oxide (TCO) interface pc evaluation from SHJ cells precursors, there is a need to prevent any contribution from the conductive c-Si. In this work, we investigated by simulation and experimental approach the parameters restricting the current confinement inside the TCO. The first one is the mid-gap trap density (Dit) at the a-Si:H/c-Si interface which has no strong impact on current confinement on simulated TLM test structures. The second one is the variation of the activation energy (Ea = Ec -EF) of the a-Si:H contact layers. Both simulated and experi-mental results have demonstrated that three current distribution regimes are possible in the TLM test structure depending on the Ea value with only one regime, for Ea between 0.6 and 1.4 eV, enabling to isolate the metal/ TCO interface. This condition is mandatory to maintain a sufficiently high potential barrier for electrons at the interfaces a-Si:H(p)/a-Si:H(i)/c-Si(n) and thus lateral current in the TCO layer to apply TLM on SHJ devices.
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