Ultralow-Power W-Band Low-Noise Amplifier Design in 130-nm SiGe BiCMOS

This letter presents a power consumption reduction aspect for a 100-GHz low-noise amplifier (LNA). Two designs implemented in 0.13-mu m SiGe bipolar complementary metal oxide semiconductor (BiCMOS) technology demonstrate state-of-the-art performance, whereas P-DC is reduced from 23.5 mW for the standard version to 3.8 mW for the low-power version. Two circuits exhibit a measured gain of 22 and 16 dB and a noise figure (NF) of 4 and 6.3 dB at 100 GHz. An input 1-dB compression point for the standard and the low-power version is -24.5 and -26.5 dBm, respectively. The occupied integrated circuit (IC) area in both cases is 0.018 and 0.014 mm(2) excluding the pads, which proves to be the most compact design among previously reported in the frequency range of interest.

Automated summary

This letter introduces a power consumption reduction aspect for a 100-GHz low-noise amplifier (LNA). Two designs implemented in 0.13-μm SiGe BiCMOS technology demonstrate state-of-the-art performance, with P-DC reduced from 23.5 mW to 3.8 mW for the low-power version. Both circuits exhibit a measured gain of 22 and 16 dB, and a noise figure of 4 and 6.3 dB at 100 GHz. The occupied IC area is 0.018 and 0.014 mm² in both cases, making it the most compact design in the frequency range of interest.