A Polymorphic Electro-Optic Logic Gate for High-Speed Reconfigurable Computing Circuits

In the wake of dwindling Moore's law, integrated electro-optic (E-O) computing circuits have shown revolutionary potential to provide progressively faster and more efficient hardware for computing. The E-O circuits for computing from the literature can operate with minimal latency at high bit-rates. However, they face shortcomings due to their operand handling complexity, non-amortizable high area and static power overheads, and general unsuitability for large-scale integration on reticle-limited chips. To alleviate these shortcomings, in this paper, we present a microring resonator (MRR) based polymorphic E-O logic gate (MRR-PEOLG) that can be dynamically programmed to implement different logic functions at different times. Our MRR-PEOLG can provide compactness and polymorphism to E-O circuits, to consequently improve their operand handling and amortization of area and static power overheads. We model our MRR-PEOLG using photonics foundry-validated tools to perform frequency and time-domain analysis of its polymorphic logic functions. Our evaluation shows that the use of our MRR-PEOLG in two E-O circuits from prior works can reduce their area-energy-delay product by up to 82.6x. A tutorial on the modeling and simulation of our MRR-PEOLG, along with related codes and files, is available on https://github.com/ukyUCAT/MRR-PEOLG.

Automated summary

This paper presents a microring resonator (MRR) based polymorphic E-O logic gate (MRR-PEOLG) that can dynamically implement different logic functions at different times, improving the performance and efficiency of E-O circuits.