4.6 Article

A 100 GBd PAM-4 Combiner and Driver in SiGe BiCMOS

Journal

IEEE MICROWAVE AND WIRELESS TECHNOLOGY LETTERS
Volume 33, Issue 9, Pages 1337-1340

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/LMWT.2023.3293040

Keywords

Baluns; BiCMOS-integrated circuits; broad-band amplifiers; driver circuits; PAM-4; silicon germanium

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This letter presents an analog PAM-4 combiner and driver circuit designed in a 130 nm SiGe BiCMOS technology, featuring an on-chip active balun with more than 67 GHz bandwidth. The output stage supports adjustable PAM-4 level spacing, consuming 315 mW and delivering 2 V-pp, V-diff in a 100 O load. Operation of up to 100 GBd has been verified by measured eye diagrams.
In this letter, we present an analog PAM-4 combiner and driver circuit based on a current steering output stage designed in a 130 nm SiGe BiCMOS technology. The circuit features an on-chip active balun with more than 67 GHz bandwidth. The output stage supports an adjustable PAM-4 level spacing. It consumes 315 mW and delivers 2 V-pp,V-diff in a 100 O load. Operation of up to 100 GBd has been verified by measured eye diagrams.

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