An Ising solver chip based on coupled ring oscillators with a 48-node all-to-all connected array architecture

Quantum-inspired computing systems can be used to efficiently solve combinatorial optimization problems. In developing such systems, a key challenge is the creation of large hardware topologies with all-to-all node connectivity that allow arbitrary problem graphs to be directly mapped to the hardware. Here we report a physics-based Ising solver chip fabricated in a standard 1.2 V, 65 nm complementary metal-oxide-semiconductor technology. The chip features an all-to-all architecture with 48 spins and a highly uniform coupling circuit with integer weights ranging from -14 to +14. The all-to-all architecture strongly couples a horizontal oscillator with a vertical oscillator so that each horizontal-vertical oscillator pair intersects with all the other pairs in a crossbar-style array and allows any graph with up to 48 nodes to be directly mapped to the hardware. We use the Ising solver chip to carry out statistical measurements for different problem sizes, graph densities, operating temperatures and problem instances. Arbitrary problem graphs with up to 48 nodes can be efficiently and quickly solved by directly mapping onto a fully connected Ising chip that uses complementary-metal-oxide-semiconductor-based oscillators.

Automated summary

Quantum-inspired computing systems with large hardware topologies are developed to efficiently solve combinatorial optimization problems. A physics-based Ising solver chip is reported, featuring an all-to-all architecture with 48 spins and a highly uniform coupling circuit. The chip allows arbitrary problem graphs with up to 48 nodes to be directly mapped to the hardware and quickly solved.