4.6 Article

Ultra-compact III-V-on-Si photonic crystal memory for flip-flop operation at 5 Gb/s

Journal

OPTICS EXPRESS
Volume 24, Issue 4, Pages 4270-4277

Publisher

OPTICAL SOC AMER
DOI: 10.1364/OE.24.004270

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Funding

  1. European FP7 ICT-RAMPLAS (ICT- FET) [270773]
  2. FP7-ICT-IP project PhoxTrot [318240]
  3. IKY Foundation through the SIEMENS Fellowship of Excellence Program

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We report on a photonic crystal (PhC) nanolaser based on the heterogeneous integration of a III-V PhC nanocavity on SOI, configured to operate as a Set-Reset Flip-Flop (SR-FF). The active layer is a nanobeam cavity made of a 650nm x 285nm InP-based wire waveguide evanescently coupled to 500nm x 220nm SOI wire waveguides, demonstrating a record-low footprint of only 6.2 mu m(2). Injection locking enables optical bistability allowing for memory operation with only 6.4fJ/bit switching energies and <50ps response times. Bit-level SR-FF memory operation was evaluated at 5Gb/s with PRBS-resembling data patterns, revealing error free operation with a negative power penalty. (C)2016 Optical Society of America

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