4.8 Article

Approaching Ohmic Contacts for Ideal Monolayer MoS2 Transistors Through Sulfur-Vacancy Engineering

Journal

SMALL METHODS
Volume -, Issue -, Pages -

Publisher

WILEY-V C H VERLAG GMBH
DOI: 10.1002/smtd.202300611

Keywords

Argon plasma etching; carrier mobility; metal-semiconductor contacts; monolayer MoS2 transistors; sulfur-vacancy engineering

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Researchers have achieved ohmic contact between metal and monolayer MoS2 by introducing a large number of sulfur vacancies, which significantly reduces contact resistance and enables high-performance MoS2 FETs. The dominant factor driving enhanced electrical performance is the increased electron doping caused by sulfur vacancies. This study provides a simple method to promote the development of atomically thin integrated circuits.
Field-effect transistors (FETs) made of monolayer 2D semiconductors (e.g., MoS2) are among the basis of the future modern wafer chip industry. However, unusually high contact resistances at the metal-semiconductor interfaces have seriously limited the improvement of monolayer 2D semiconductor FETs so far. Here, a high-scale processable strategy is reported to achieve ohmic contact between the metal and monolayer MoS2 with a large number of sulfur vacancies (SVs) by using simple sulfur-vacancy engineering. Due to the successful doping of the contact regions by introducing SVs, the contact resistance of monolayer MoS2 FET is as low as 1.7 k & omega;& BULL;& mu;m. This low contact resistance enables high-performance MoS2 FETs with ultrahigh carrier mobility of 153 cm(2) V-1 s(-1), a large on/off ratio of 4 x 10(9), and high saturation current of 342 & mu;A & mu;m(-1). With the comprehensive investigation of different SV concentrations by adjusting the plasma duration, it is also demonstrated that the SV-increased electron doping, with its resulting reduced Schottky barrier, is the dominant factor driving enhanced electrical performance. The work provides a simple method to promote the development of industrialized atomically thin integrated circuits.

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