Journal
ELECTRONICS
Volume 12, Issue 14, Pages -Publisher
MDPI
DOI: 10.3390/electronics12143046
Keywords
successive approximation analog-to-digital converters; SAR; ADC; redundancy; digital background calibration; data weight averaging
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This paper presents a digital calibration method for a 10-bit noise-shaping SAR ADC. The proposed method achieves a similar INL and 1.3 dB better SNR compared to the traditional DWA method without oversampling. It also saves 50% power and occupies a small active area in the fabrication process.
This paper presents a digital calibration method for a 10-bit noise-shaping Successive Approximation Register Analog to Digital Converter (SAR ADC). The proposed calibration method is inspired by its Data Weight Averaging (DWA) counterpart, but stays static, while achieving a similar Integral Nonlinearity (INL) and 1.3 dB better Signal-to-Noise Ratio (SNR) in measurements without oversampling. This advantage in SNR holds until an Oversampling Ratio (OSR) of 2 for the proposed method, which also saves 50 % power. At a 1.2 V power supply, the ADC consumes a power of 70 & mu;W at a conversion rate of 50 kHz. Fabricated using 55 nm Complementary Metal Oxide Semiconductor (CMOS) Metal-Oxide-Metal Capacitor (MOMCAP) technology, it occupies an active area of 370 & mu;m x 350 & mu;m, when achieving an INL of 0.3 Least Significant Bit (LSB) and an SNR of 66.9 dB at an OSR of 8.
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