Degradation Mapping and Impact of Device Dimension on IGZO TFTs BTI

We studied the impact of gate and drain stress biases combination on IGZO based TFTs degradation targeting hot carrier regime. We show that typical signatures of this mechanism (e.g., saturation current degradation and SS increase) are not visible even at high drain biases, while a gate bias dependence only (BTI) is present in most of the degradation data. We also identify an unexpected gate-length dependence of BTI, for which different extrinsic causes are investigated.

Automated summary

This study investigates the impact of gate and drain stress biases combination on the degradation of IGZO based TFTs. It shows that the typical signatures of this mechanism are not visible even at high drain biases, and only a gate bias dependence is present in most of the degradation data. The study also identifies an unexpected gate-length dependence of BTI and explores different extrinsic causes.