Hardware/Software Co-Design of Cryptographic SoC Based on RISC-V Virtual Prototype

Article Engineering, Electrical & Electronic

A Dual-Core High-Performance Processor for Elliptic Curve Cryptography in GF(p) Over Generic Weierstrass Curves

Yujun Xie et al.

Summary: This brief presents a dual-core high-performance processor for Elliptic Curve Cryptography (ECC) in GF(p) over Generic Weierstrass Curves. It includes an optimized radix-128 Montgomery modular multiplication algorithm, a dual-core hardware architecture for elliptic curve point-multiplication (PM), and a data transfer architecture between the cores. The proposed design achieves faster PM calculations.

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS (2022)

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Article Computer Science, Hardware & Architecture

The MicroRV32 framework: An accessible and configurable open source RISC-V cross-level platform for education and research

Sallar Ahmadi-Pour et al.

Summary: mu RV32 is an open source RISC-V platform that supports bare-metal applications and operating systems, provides RTL and VP descriptions, and is convenient to use and support small low-cost FPGAs under Linux, making it a suitable foundation for further research and education.

JOURNAL OF SYSTEMS ARCHITECTURE (2022)

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Article Engineering, Electrical & Electronic

NTT Architecture for a Linux-Ready RISC-V Fully-Homomorphic Encryption Accelerator

Rogerio Paludo et al.

Summary: This paper proposes two architectures for accelerating Number Theoretic Transforms (NTTs) using a novel Montgomery-based butterfly. One is a custom NTT hardware accelerator for FPGAs, and the other is an extended RISC-V core with a six-stage pipeline and custom instructions. The proposed architectures show significant improvements in resource usage, speed, and power efficiency compared to existing technologies, as demonstrated on both FPGA and ASIC platforms.

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS (2022)

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Article Engineering, Electrical & Electronic

A High-Performance Core Micro-Architecture Based on RISC-V ISA for Low Power Applications

Satyajit Bora et al.

Summary: The novel processor micro-architecture based on RISC-V ISA has been implemented on Xilinx Virtex-7 FPGA board, achieving high performance with low power requirements. It outperforms many existing commercial and open-source cores in various benchmark tests, showcasing its superior capabilities in the field of processor design.

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS (2021)

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Article Computer Science, Hardware & Architecture