Journal
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
Volume 70, Issue 9, Pages 3278-3282Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TCSII.2023.3263876
Keywords
Low-dropout regulator (LDO); low-quiescent current; low voltage; adaptive biasing; power management integrated circuit (PMIC); ultra-low-power mode
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This article presents a low-dropout regulator (LDO) for power-efficient IoT devices. The proposed LDO senses the load current and enters an ultra-low-power mode to enable a low-power system when the devices are in standby mode. The LDO switches between an ultra-low-power mode and an active mode, with the former turning off the core circuit to save power. The implementation and measurement of silicon LDO chips demonstrate the successful operation of the proposed scheme, achieving an extremely low-quiescent current and a superior figure-of-merit (FOM).
This brief presents a low-dropout regulator (LDO) for power-efficient Internet of Things (IoT) devices. When IoT devices are in low-power standby mode, the proposed LDO senses the load current and enters an ultra-low-power mode to enable an extremely low-power system. The proposed LDO alternates between two modes of operation. One is the ultra-low-power mode in which the core circuit of the LDO is turned off to save power, and the other is an active mode in which all circuit components are on. The successful operation of the proposed scheme is demonstrated by implementing and measuring silicon LDO chips, resulting in an extremely low-quiescent current of 13.5 nA and a superior figure-of-merit (FOM).
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