Journal
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
Volume 70, Issue 8, Pages 3054-3058Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TCSII.2023.3253686
Keywords
CGRA; GRF access; inserted operations; bus routing mode; BusMap
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Coarse-grained reconfigurable array (CGRA) is popular in compute-intensive applications due to its flexibility and energy-efficiency. In this study, a new routing mode called bus routing is proposed for complex data flow graphs (DFGs) in CGRA. The BusMap mapping method, which incorporates bus routing, solves the maximum independent set (MIS) problem to map the DFG onto CGRA. Experimental results show that BusMap achieves fewer global register file (GRF) accesses and inserted operations compared to previous methods, while maintaining the same or smaller initiation interval (II).
Coarse-grained reconfigurable array (CGRA) has gained popularity in compute-intensive applications because of its flexibility and energy-efficiency. When mapping the data flow graph (DFG) abstracted from the kernel loop of the application to CGRA, for data routing especially DFGs with high fan-out operations, data transfer through the global register file (GRF) and insert routing/recomputation operations in the DFG are two ways that can serve as routing paths, but with increased power cost. For the data routing in these complex DFGs, we propose a new routing mode, bus routing, to exploit the buses as routing paths between PEs without GRF access and inserted operations. A mapping method incorporating bus routing, BusMap, is proposed to map the DFG onto CGRA by solving the maximum independent set (MIS) on a quadruple resource occupation conflict graph. The experiment results show BusMap can achieve fewer GRF access and inserted operations while having the same or even smaller initiation interval (II) compared to previous works.
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