An Ultra-Low-Voltage 2.4-GHz Flicker-Noise-Free RF Receiver Front End Based on Switched-Capacitor Hybrid TIA With 4.5-dB NF and 11.5-dBm OIP3

In this article, an ultra-low-voltage 2.4-GHz radio frequency (RF) receiver front-end architecture targeting the removal of output flicker noise is presented, making it possible to use zero-IF topology for narrow-band communication standards. The trans-impedance amplifier (TIA) is built on the proposed hybrid operational trans-conductance amplifier (OTA) with a switched-capacitor (SC) amplifier as the first gain stage and an active primary-secondary amplifier as the second gain stage, achieving an imperceptible flicker-noise corner frequency. With the SC gain stage, the interstage common-mode voltage can be set to 0 V, which reduces the minimum supply voltage to 0.5 V. As another benefit, dc offset compensation (DCOC) is performed inherently in the interstage sampling and coupling process. Fabricated in 28-nm RF CMOS process, the front-end prototype, including an on-chip matching inductor, occupies a die area of 0.8 mm(2). Operating in the Industrial Scientific Medical (ISM) frequency band of 2.4 GHz with 1-MHz IF bandwidth, the front end provides a 36-40-dB conversion gain, an 11.5-dBm OIP3, and a flicker-noise corner frequency less than 10 kHz with the supply voltage ranging from 0.5 to 0.6 V. The RF impedance matching network provides passive voltage gain before the lownoise trans-conductance amplifier (LNTA), achieving a 4.5-dB noise figure (NF) with 0.8-mA biasing current in the gm stage. With the ultra-low supply voltage and the passive IF gain stage, the power consumption of the proposed front end is only 610 mu W under a 0.53-V supply voltage.

Automated summary

This article presents an architecture for an ultra-low-voltage 2.4 GHz RF receiver front-end that targets the removal of output flicker noise, enabling the use of zero-IF topology for narrow-band communication standards. The proposed design achieves imperceptible flicker-noise corner frequency by using a hybrid operational trans-conductance amplifier (OTA) with switched-capacitor (SC) and primary-secondary amplifiers. It also offers the benefits of reduced minimum supply voltage and inherent dc offset compensation (DCOC). The front-end prototype, fabricated in a 28-nm RF CMOS process, demonstrates high performance with low power consumption.