4.6 Article

High-Performance Floating Gate Heterostructure With WSe2-MoS2 Diode Channel for Neural Synapse

Journal

IEEE ELECTRON DEVICE LETTERS
Volume 44, Issue 7, Pages 1084-1087

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/LED.2023.3278454

Keywords

p-n diode; floating gate device; 2D material; neuromorphic computing

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In this study, a novel floating gate heterostructure based on 2D materials is proposed, where WSe2-MoS2 forms a p-n diode as the channel and multilayer graphene serves as the floating gate. The device demonstrates a large memory window, high ON/OFF ratio, stable retention, and cyclic endurance. Additionally, it achieves a high max-min conductance ratio, low nonlinearity coefficients, and record low energy consumption when used as a neural synapse. This work presents a new design for 2D material heterostructures in the implementation of neural synapses for neuromorphic computing.
In this letter, we propose a novel floating gate heterostructure based on two-dimensional (2D) materials, with WSe2-MoS2 forming a p-n diode to serve as the channel and multilayer graphene as the floating gate. Different from previous floating gate devices, the p-n diode is used here instead of a single layer of 2D material in the channel layer to improve the gate-tuning capability. Our device exhibits a large memory window (14 V), high ON/OFF ratio (10(4)), stable retention (5000 s), and cyclic endurance (1500 cycles). When used as a neural synapse, the device is able to realize a high max-min conductance ratio (G(max)/G(min) = 28), low nonlinearity coefficients (?) of -2.0 for potentiation and -2.5 for depression, and record low energy consumption of 9 (15) aJ per spike in potentiation (depression). Our work provides a novel design of 2D material heterostructure to be used as an implementation of neural synapses for neuromorphic computing.

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