Journal
ACS NANO
Volume -, Issue -, Pages -Publisher
AMER CHEMICAL SOC
DOI: 10.1021/acsnano.3c03932
Keywords
Ambipolar transport; dual-gate; transitionmetal dichalcogenides; cascadability; logic gates; V-T-drop gates; fall; rise time
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Ambipolar dual-gate transistors based on low-dimensional materials enable reconfigurable logic circuits with suppressed off-state current. This article presents high-performance ambipolar dual-gate transistors based on tungsten diselenide (WSe2), which exhibit high on-off ratio, low off-state current, negligible hysteresis, and ideal subthreshold swing. Cascadable logic gates with minimal static power consumption are demonstrated using these transistors. The study also investigates the behavior of both control gate and polarity gate and analyzes the noise margin and speed performance of the circuits built by dual-gate devices. This work advances the field of ambipolar dual-gate transistors and showcases their potential for low-power, high-speed, and more flexible logic circuits.
Ambipolar dual-gate transistors based on low-dimensionalmaterials,such as graphene, carbon nanotubes, black phosphorus, and certaintransition metal dichalcogenides (TMDs), enable reconfigurable logiccircuits with a suppressed off-state current. These circuits achievethe same logical output as complementary metal-oxide semiconductor(CMOS) with fewer transistors and offer greater flexibility in design.The primary challenge lies in the cascadability and power consumptionof these logic gates with static CMOS-like connections. In this article,high-performance ambipolar dual-gate transistors based on tungstendiselenide (WSe2) are fabricated. A high on-offratio of 10(8) and 10(6), a low off-state currentof 100 to 300 fA, a negligible hysteresis, and an ideal subthresholdswing of 62 and 63 mV/dec are measured in the p- and n-type transport,respectively. We demonstrate cascadable and cascaded logic gates usingambipolar TMD transistors with minimal static power consumption, includinginverters, XOR, NAND, NOR, and buffers made by cascaded inverters.A thorough study of both the control gate and the polarity gate behavioris conducted. The noise margin of the logic gates is measured andanalyzed. The large noise margin enables the implementation of V-T-drop circuits, a type of logic with reduced transistor numberand simplified circuit design. Finally, the speed performance of theV(T)-drop and other circuits built by dual-gate devices isqualitatively analyzed. This work makes advancements in the fieldof ambipolar dual-gate TMD transistors, showing their potential forlow-power, high-speed, and more flexible logic circuits.
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