Uncovering hidden network architecture from spiking activities using an exact statistical input-output relation of neurons

Identifying network architecture from observed neural activities is crucial in neuroscience studies. A key requirement is knowledge of the statistical input-output relation of single neurons in vivo. By utilizing an exact analytical solution of the spike-timing for leaky integrate-and-fire neurons under noisy inputs balanced near the threshold, we construct a framework that links synaptic type, strength, and spiking nonlinearity with the statistics of neuronal population activity. The framework explains structured pairwise and higher-order interactions of neurons receiving common inputs under different architectures. We compared the theoretical predictions with the activity of monkey and mouse V1 neurons and found that excitatory inputs given to pairs explained the observed sparse activity characterized by strong negative triple-wise interactions, thereby ruling out the alternative explanation by shared inhibition. Moreover, we showed that the strong interactions are a signature of excitatory rather than inhibitory inputs whenever the spontaneous rate is low. We present a guide map of neural interactions that help researchers to specify the hidden neuronal motifs underlying observed interactions found in empirical data. An analytical framework linking network architecture, neuronal nonlinearity and population activity offers a guide map to infer the hidden input architecture to neural trios from observed interactions in empirical data.

Automated summary

Identifying network architecture from observed neural activities is crucial in neuroscience studies. By utilizing an exact analytical solution, we construct a framework that links synaptic type, strength, and spiking nonlinearity with the statistics of neuronal population activity. The framework explains interactions of neurons receiving common inputs under different architectures. Comparisons with empirical data provide a guide map to infer the hidden input architecture.