Design of Self-Calibration Comparator for 12-Bit SAR ADCs

A novel self-calibration comparator for a 12-bit 2.5 MSPS successive approximation register analog-to-digital converter (SAR ADC) applied in a touch microcontroller unit (MCU) with small area, high precision, fast response speed, and low-voltage detection is proposed in this paper. A combination of input/output offset storage (IOS/OOS) and an offset trimming circuit was employed to reduce the offset of the cascade preamplifier and the operational transconductance amplifier (OTA), a novel offset trimming circuit with a 5-bit digital controller was designed to further reduce the residual offset voltage, and an improved self-calibration technology was also implemented to compensate the conversion error in SAR ADC system to a minimum. Simulation and measured results show that the input-referred offset calibrating range is +/- 9.15 mV at 0.61 mV/step, the low-voltage detection of SAR ADC is realized by compensating the conversion error to a minimum, and the effective number of bits (ENOB) and figure of merit (FoM) at 5 V supply and 2.5 M/s rate in the 12-bit SAR ADC with a 95 nm CMOS are 11.33 bits and 726.6 fJ/conversion-step, respectively. The proposed self-calibration comparator applied in the SAR ADC system can automatically eliminate the offset voltage caused by nonidealities and meet the requirements of the touch MCU.

Automated summary

A novel self-calibration comparator for a 12-bit 2.5 MSPS SAR ADC applied in a touch MCU with small area, high precision, fast response speed, and low-voltage detection is proposed in this paper. It employs a combination of IOS/OOS and an offset trimming circuit to reduce the offset of the cascade preamplifier and OTA, and a 5-bit digital controller is designed to further reduce residual offset voltage. The self-calibration technology compensates the conversion error in the SAR ADC system to a minimum.