Sidewall Modification Process for Trench Silicon Power Devices

In this study, trench sidewall modification processes were designed to improve profile uniformity and thereby enhance the electrical performance of silicon power devices in large-scale production. The effects of trench sidewall modification on the morphology, structure and electrical properties were studied. Plasma-induced damage in etching processes was also observed and briefly explained. Straight and smooth sidewall profiles were achieved through adjusting the SF6/CHF3 proportion in a combined etchant gas flow in the main etching procedure. By comparing HRSEM images from different etching protocols, it was evident that an enhanced CHF3 flow formed a proper passivation of the sidewall, eliminating the ion damages that are common in current main etch steps. To address the impurities introduced from the etchant gas and improve the gate oxide uniformity, further steps of depolymerization were applied in a plasma asher chamber, followed by wet clean steps. In the meantime, the plasma-induced charge accumulation effect was reduced by UV curing. Improved trench sidewall profiles and the gate oxide uniformity contributed to a lower leakage current between the gate and source terminals, leading to an overall yield enhancement of device properties in large-scale silicon wafer fabrication.

Automated summary

Trench sidewall modification processes were utilized to enhance the electrical performance of silicon power devices in large-scale production. Effects on morphology, structure, and electrical properties were investigated. Improved sidewall profiles and enhanced gate oxide uniformity led to lower leakage current and overall yield enhancement of device properties in silicon wafer fabrication.