Transport Characteristics of Silicon Multi-Quantum-Dot Transistor Analyzed by Means of Experimental Parametrization Based on Single-Hole Tunneling Model

The transport characteristics of a gate-all-around Si multiple-quantum-dot (QD) transistor were studied by means of experimental parametrization using theoretical models. The device was fabricated by using the e-beam lithographically patterned Si nanowire channel, in which the ultrasmall QDs were self-created along the Si nanowire due to its volumetric undulation. Owing to the large quantum-level spacings of the self-formed ultrasmall QDs, the device clearly exhibited both Coulomb blockade oscillation (CBO) and negative differential conductance (NDC) characteristics at room temperature. Furthermore, it was also observed that both CBO and NDC could evolve along the extended blockade region within wide gate and drain bias voltage ranges. By analyzing the experimental device parameters using the simple theoretical single-hole-tunneling models, the fabricated QD transistor was confirmed as comprising the double-dot system. Consequently, based on the analytical energy-band diagram, we found that the formation of ultrasmall QDs with imbalanced energetic natures (i.e., imbalanced quantum energy states and their imbalanced capacitive-coupling strengths between the two dots) could lead to effective CBO/NDC evolution in wide bias voltage ranges.

Automated summary

The transport characteristics of a gate-all-around Si multiple-quantum-dot (QD) transistor were studied experimentally and parametrized using theoretical models. The device was fabricated using e-beam lithography to create ultrasmall QDs along a Si nanowire channel. The device exhibited Coulomb blockade oscillation (CBO) and negative differential conductance (NDC) at room temperature, which could evolve in wide bias voltage ranges. Analysis confirmed that the QD transistor was a double-dot system and the formation of imbalanced ultrasmall QDs led to effective CBO/NDC evolution in wide voltage ranges.