Related references
Note: Only part of the references are listed.Effect of CNT Parameter Variations on CNTFET Amplifier Performance
G. Gelao et al.
ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY (2023)
Analysis of Noise in Current Mirror Circuits Based on CNTFET and MOSFET
R. Marani et al.
ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY (2022)
Study of Power Gain Capability of CNTFET Power Amplifier in THz Frequency Range
G. Gelao et al.
ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY (2022)
Analysis of Limits of CNTFET Devices through the Design of a Differential Amplifier
G. Gelao et al.
ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY (2021)
Editors' Choice-Effects of Parasitic Elements of Interconnection Lines in CNT Embedded Integrated Circuits
R. Marani et al.
ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY (2020)
A Review on the Study of Temperature Effects in the Design of A/D Circuits based on CNTFET
Roberto Marani et al.
CURRENT NANOSCIENCE (2019)
Design and Simulation Study of Full Adder Circuit Based on CNTFET and CMOS Technology by ADS
R. Marani et al.
ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY (2018)
Effects of Temperature in CNTFET-Based Design of Digital Circuits
G. Gelao et al.
ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY (2018)
Effects of Temperature in CNTFET-Based Design of Analog Circuits
G. Gelao et al.
ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY (2018)
CNTFET-Based Design of Current Mirror in Comparison with MOS Technology
R. Marani et al.
ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY (2017)
Analysis of CNTFETs Operating in SubThreshold Region for Low Power Digital Applications
R. Marani et al.
ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY (2016)
A Simulation Study of Analogue and Logic Circuits with CNTFETs
R. Marani et al.
ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY (2016)
A De-Embedding Procedure to Determine the Equivalent Circuit Parameters of RF CNTFETs
R. Marani et al.
ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY (2016)
A Comparison of CNTFET Models through the Design of a SRAM Cell
R. Marani et al.
ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY (2016)
A Model to Improve Analysis of CNTFET Logic Gates in Verilog-A - Part II: Dynamic Analysis
Gennaro Gelao et al.
CURRENT NANOSCIENCE (2015)
A Model to Improve Analysis of CNTFET Logic Gates in Verilog-A-Part I: Static Analysis
Gennaro Gelao et al.
CURRENT NANOSCIENCE (2015)
A Compact Virtual-Source Model for Carbon Nanotube FETs in the Sub-10-nm Regime-Part II: Extrinsic Elements, Performance Assessment, and Design Optimization
Chi-Shuen Lee et al.
IEEE TRANSACTIONS ON ELECTRON DEVICES (2015)
A Compact Virtual-Source Model for Carbon Nanotube FETs in the Sub-10-nm Regime-Part I: Intrinsic Elements
Chi-Shuen Lee et al.
IEEE TRANSACTIONS ON ELECTRON DEVICES (2015)
Modelling of Carbon Nanotube Field Effect Transistors oriented to SPICE software for A/D circuit design
Roberto Marani et al.
MICROELECTRONICS JOURNAL (2013)
Comparison of ABM SPICE Library with Verilog-A for Compact CNTFET Model Implementation
Roberto Marani et al.
CURRENT NANOSCIENCE (2012)
A DC model of carbon nanotube field effect transistor for CAD applications
Roberto Marani et al.
INTERNATIONAL JOURNAL OF ELECTRONICS (2012)
A Compact, Semi-empirical Model of Carbon Nanotube Field Effect Transistors Oriented to Simulation Software
Roberto Marani et al.
CURRENT NANOSCIENCE (2011)
A Semiempirical SPICE Model for n-Type Conventional CNTFETs
Gennaro Gelao et al.
IEEE TRANSACTIONS ON NANOTECHNOLOGY (2011)
Carbon-based electronics
Phaedon Avouris et al.
NATURE NANOTECHNOLOGY (2007)
A circuit-compatible model of ballistic carbon nanotube field-effect transistors
A Raychowdhury et al.
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS (2004)
High-κ dielectrics for advanced carbon-nanotube transistors and logic gates
A Javey et al.
NATURE MATERIALS (2002)