Journal
ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY
Volume 12, Issue 3, Pages -Publisher
ELECTROCHEMICAL SOC INC
DOI: 10.1149/2162-8777/acbedf
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In this review, we implemented a semi-empirical compact model for CNTFETs in SPICE using ABM library and in Verilog-A language of ADS, highlighting the differences between the two software. We reviewed the design of analog circuits (common source amplifier and phase-shift oscillator) and digital circuits (NOT and NAND gates) in both SPICE and Verilog-A, observing comparable results in dynamic simulations and same results in static simulations. Additionally, we found that Verilog-A has shorter simulation run time and is more concise and clear than schemes using ABM blocks in SPICE.
In this review, through the simulation of some A/D electronic circuits, we implement a semi-empirical compact model for CNTFETs, already proposed by us and briefly recalled, both in SPICE, using ABM library, and in Verilog-A language of ADS, highlighting the differences between the two software. In particular we review the design of a common source amplifier and a phase-shift oscillator, as examples of analog circuits, and the design of NOT and NAND gates, as example of digital circuits, both in SPICE and in Verilog-A, observing that the obtained results are the same in static simulations and comparable in dynamic simulations. At last we show that Verilog-A has a simulation run time much shorter and is much more concise and clear than schemes using ABM blocks in SPICE.
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