Journal
COMPUTERS & ELECTRICAL ENGINEERING
Volume 108, Issue -, Pages -Publisher
PERGAMON-ELSEVIER SCIENCE LTD
DOI: 10.1016/j.compeleceng.2023.108688
Keywords
Automotive engine idle speed regulation; Parallel architecture and fpga; Firefly swarm optimization algorithm; High performance; Nonlinear model predictive control; Optimization
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This paper presents the development of an automotive engine idle speed controller using nonlinear model predictive control and the Firefly Algorithm (NMPC-FA-ISE). The NMPC-FA is implemented on a FPGA platform using the Vivado HLS tool. The FA algorithm is employed to handle the nonlinearity of NMPC. Experimental results demonstrate satisfactory control performance with fast response time and acceptable power consumption.
This paper developed an automotive engine idle speed controller using nonlinear model predic-tive control and the Firefly Algorithm for Idle Speed Engine (NMPC-FA-ISE). The designed NMPC-FA is implemented on a field-programmable gate array (FPGA). The Vivado HLS tool performs the complete design flow for FPGA platforms. It was adopted and used where different optimization techniques are applied to achieve the best performance. Moreover, the Firefly swarm optimiza-tion algorithm (FA) was employed to handle the nonlinearity of NMPC instead of traditional techniques. An Engine Idle Speed Controller (ISC) is used to demonstrate the suggested NMPC and FA implementation solution on Python Productivity for the ZYNQ platform (PYNQ). The exper-imental results of the proposed approach proved that the FPGA implementation of the proposed NMPC-FA achieved satisfactory control performance for the engine idle speed control with a fast response time and acceptable power consumption according to the area occupied on the board.
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