Journal
JOURNAL OF SUPERCOMPUTING
Volume 72, Issue 4, Pages 1549-1569Publisher
SPRINGER
DOI: 10.1007/s11227-016-1680-4
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Funding
- Air Force Office of Scientific Research under the AFOSR [FA9550-12-1-0476]
- National Science Foundation [0904782, 1047772, 1516096]
- US Department of Energy, Office of Advanced Scientific Computing Research, through the Ames Laboratory [DE-AC02-07CH11358]
- US Department of Defense High Performance Computing Modernization Program through a HASI grant
- Direct For Computer & Info Scie & Enginr
- Office of Advanced Cyberinfrastructure (OAC) [0904782] Funding Source: National Science Foundation
- Direct For Computer & Info Scie & Enginr
- Office of Advanced Cyberinfrastructure (OAC) [1516096, 1047772] Funding Source: National Science Foundation
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Energy efficiency and energy-proportional computing have become a central focus in modern supercomputers. Many previous energy-saving strategies have focused solely on the CPU while the DRAM subsystem has not been addressed sufficiently, even though memory consumes about 20 % of the total power in a typical server platform. This paper describes a novel runtime system that scales the frequency of both processor and DRAM-based on the performance and power models, also proposed here. Specifically, first, a performance-loss constraint is chosen for an application, then, an optimal processor-DRAM frequency pair is modeled such that the pair minimizes the energy consumption in a given timeslice. Experiments performed on SPEC CPU (TM) 2006, NAS NPB, and pARMS benchmarks demonstrate that the proposed runtime system may obtain total energy savings both for memory- and compute-intensive applications. In particular, as much as 22 % of energy was saved with a low performance loss of about 4.8 %.
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