☆ 4.1 Article

Hybrid MTJ/CNTFET-Based Binary Synapse and Neuron for Process-in-Memory Architecture

IEEE MAGNETICS LETTERS (2023)

Related references

Note: Only part of the references are listed.

Article Engineering, Electrical & Electronic

An SEU-hardened ternary SRAM design based on efficient ternary C-elements using CNTFET technology

Vahid Bakhtiary et al.

Summary: Ternary logic has been studied for its potential advantages in reducing complexity and interconnects. This paper proposes a robust ternary SRAM (TSRAM) cell using a novel ternary C-element based on carbon nanotube field-effect transistors (CNTFETs). A 2mx2n ternary memory array architecture is also designed and simulated. The proposed TSRAM is radiation-hardened and robust, offering higher critical charge and SNM with minimal area overhead and only requiring two threshold voltages.

MICROELECTRONICS RELIABILITY (2023)

Add to Collection

Article Computer Science, Information Systems

High-Performance and Robust Spintronic/CNTFET-Based Binarized Neural Network Hardware Accelerator

Milad Tanavardi Nasab et al.

Summary: This paper proposes a BNN hardware accelerator based on a nonvolatile XNOR/XOR circuit designed using MTJ and GAA-CNTFET devices. The design eliminates external memory access, reducing data transmission delay and power dissipation. It has low energy consumption, making it suitable for battery-operated devices. The combinational read circuitry of the design exhibits high robustness to process variations. Simulation results show a negligible logical error rate and high network accuracy even with significant process variations. The proposed hardware accelerator outperforms its state-of-the-art counterparts in terms of power, PDP, and area with improvements of at least 13%, 29%, and 41%.

IEEE TRANSACTIONS ON EMERGING TOPICS IN COMPUTING (2023)

Add to Collection

Article Engineering, Electrical & Electronic

Fully Nonvolatile Hybrid Full Adder Based on SHE plus STT-MTJ/CMOS LIM Architecture

Prashanth Barla et al.

Summary: This article proposes a full adder circuit based on the hybrid spin-Hall-effect-assisted and spin transfer torque-magnetic tunnel junction CMOS logic-in-memory architecture. By introducing continuous monitoring and self-write-termination processes, the circuit successfully eliminates energy wastage and achieves significant energy savings in exact computation.

IEEE TRANSACTIONS ON MAGNETICS (2022)

Add to Collection

Article Engineering, Electrical & Electronic

Theoretical Circuit Design of an Efficient Spintronic Random Number Generator With an Internal Postprocessing Unit

Saeed Mehri et al.

Summary: This letter proposes a spintronic true random number generator using the stochastic switching feature of the magnetic tunnel junction device. The proposed generator consumes low power, occupies a small area, and includes an internal postprocessing unit to improve the quality of random numbers production. The simulation results show that the proposed TRNG consumes less power and has a smaller area compared to state-of-the-art designs, and it successfully passes random number tests even with fabrication process variations.

IEEE MAGNETICS LETTERS (2022)

Add to Collection

Article Engineering, Electrical & Electronic

Exploiting Carbon Nanotube FET and Magnetic Tunneling Junction for Near-Memory-Computing Paradigm

Nan Yang et al.

Summary: The integration of CNTFETs and STT-MTJs in nonvolatile logic circuits shows significant advantages, which is of great significance for the development beyond CMOS electronics.

IEEE TRANSACTIONS ON ELECTRON DEVICES (2021)

Add to Collection

Article Computer Science, Hardware & Architecture

High-Performance Spintronic Nonvolatile Ternary Flip-Flop and Universal Shift Register

Abdolah Amirany et al.

Summary: The article introduces new ternary retention flip-flops and shift registers utilizing spin logic, carbon nanotube field-effect transistors, and magnetic tunnel junctions, aimed at reducing power consumption and eliminating the risk of data loss. Simulation results show significant reductions in power consumption, backup time, and restore energy, offering at least 22%, 40%, and 15% improvements, respectively.

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS (2021)

Add to Collection

Article Engineering, Electrical & Electronic

Accuracy-Adaptive Spintronic Adder for Image Processing Applications

Abdolah Amirany et al.

Summary: Approximate computing is a computing paradigm that can trade accuracy for power, area, and delay, and magnetic tunnel junction cells can further advance these developments. In this research, two novel MTJ-based approximate full-adder circuits are proposed and evaluated, with an extension to an 8-bit accuracy-adaptive adder. The proposed accuracy-adaptive adder offers significant improvements in power and performance compared to conventional accurate counterparts at the expense of tolerable loss of accuracy.

IEEE TRANSACTIONS ON MAGNETICS (2021)

Add to Collection

Proceedings Paper Computer Science, Theory & Methods

MTMR-SNQM: Multi-Tunnel Magnetoresistance Spintronic Non-volatile Quaternary Memory

Abdolah Amirany et al.

Summary: In this study, a quaternary non-volatile memory cell was designed and simulated using the threshold voltage tunability of gate-all-around carbon nanotube field-effect transistor transistors (GAA-CNTFET) and non-volatile property of the magnetic tunnel junctions (MTJ). The simulation results demonstrated that the proposed memory cell occupies a smaller area and consumes lower power compared to existing non-volatile quaternary memory, with correct operation even in the presence of process variations shown in Monte-Carlo simulations.

2021 IEEE 51ST INTERNATIONAL SYMPOSIUM ON MULTIPLE-VALUED LOGIC (ISMVL 2021) (2021)

Add to Collection

Article Engineering, Electrical & Electronic

A Task-Schedulable Nonvolatile Spintronic Field-Programmable Gate Array

Abdolah Amirany et al.

Summary: This letter describes the development of a nonvolatile spintronic FPGA structure with task-scheduling capability, which utilizes the nonvolatile feature of magnetic tunnel junction device to store configurations and enhance system performance.

IEEE MAGNETICS LETTERS (2021)

Add to Collection

Article Computer Science, Artificial Intelligence

Realizing Behavior Level Associative Memory Learning Through Three-Dimensional Memristor-Based Neuromorphic Circuits

Hongyu An et al.

Summary: In this paper, a behavior-level associative memory learning method was successfully implemented, associating concurrent visual and auditory information by linking large-scale artificial neural networks. This approach mimics human-like associative memory learning behavior and offers insights into designing brain-like self-learning neuromorphic systems.

IEEE TRANSACTIONS ON EMERGING TOPICS IN COMPUTATIONAL INTELLIGENCE (2021)

Add to Collection

Article Computer Science, Information Systems

Low-Energy Acceleration of Binarized Convolutional Neural Networks Using a Spin Hall Effect Based Logic-in-Memory Architecture

Ashkan Samiee et al.

Summary: Deep Learning (DL) offers high accuracy performance in tasks such as image recognition and intelligent behavior learning, but requires high computational and energy consumption demands. Hardware implementations can substantially improve the performance of DL. This paper introduces a new Spintronic Logic-in-Memory (S-LIM) XNOR neural network design, which achieves significant improvements in energy consumption, throughput, and accuracy compared to the state-of-the-art hardware implementations.

IEEE TRANSACTIONS ON EMERGING TOPICS IN COMPUTING (2021)

Add to Collection

Article Engineering, Electrical & Electronic

Spin Hall MTJ Devices for Advanced Neuromorphic Functions

Andrew W. Stephan et al.

IEEE TRANSACTIONS ON ELECTRON DEVICES (2020)

Add to Collection

Article Engineering, Electrical & Electronic

Nonvolatile Low-Cost Approximate Spintronic Full Adders for Computing in Memory Architectures

Ramin Rajaei et al.

IEEE TRANSACTIONS ON MAGNETICS (2020)

Add to Collection

Article Engineering, Electrical & Electronic

Fabrication of carbon nanotube field-effect transistors in commercial silicon manufacturing facilities

Mindy D. Bishop et al.

NATURE ELECTRONICS (2020)

Add to Collection

Review Engineering, Electrical & Electronic

Neuromorphic spintronics

J. Grollier et al.

NATURE ELECTRONICS (2020)

Add to Collection

Article Physics, Applied

Design of an energy-efficient XNOR gate based on MTJ-based nonvolatile logic-in-memory architecture for binary neural network hardware

Masanori Natsui et al.

JAPANESE JOURNAL OF APPLIED PHYSICS (2019)

Add to Collection

Article Multidisciplinary Sciences

Modern microprocessor built from complementary carbon nanotube transistors

Gage Hills et al.

NATURE (2019)

Add to Collection

Review Materials Science, Multidisciplinary

Emerging Memory Devices for Neuromorphic Computing

Novnidhi K. Upadhyay et al.

ADVANCED MATERIALS TECHNOLOGIES (2019)

Add to Collection

Article Engineering, Electrical & Electronic

Carbon Nanotube CMOS Analog Circuitry

Rebecca Ho et al.

IEEE TRANSACTIONS ON NANOTECHNOLOGY (2019)

Add to Collection

Article Engineering, Electrical & Electronic

Process-in-Memory Using a Magnetic-Tunnel-Junction Synapse and a Neuron Based on a Carbon Nanotube Field-Effect Transistor

Abdolah Amirany et al.

IEEE MAGNETICS LETTERS (2019)

Add to Collection

Article Engineering, Electrical & Electronic

Low Energy Barrier Nanomagnet Design for Binary Stochastic Neurons: Design Challenges for Real Nanomagnets With Fabrication Defects

Md. Ahsanul Abeed et al.

IEEE MAGNETICS LETTERS (2019)

Add to Collection

Article Computer Science, Artificial Intelligence

GXNOR-Net: Training deep neural networks with ternary weights and activations without full-precision memory under a unified discretization framework

Lei Deng et al.

NEURAL NETWORKS (2018)

Add to Collection

Article Engineering, Electrical & Electronic

Reliable, High-Performance, and Nonvolatile Hybrid SRAM/MRAM-Based Structures for Reconfigurable Nanoscale Logic Devices

Ramin Rajaei et al.

JOURNAL OF NANOELECTRONICS AND OPTOELECTRONICS (2018)

Add to Collection

Article Multidisciplinary Sciences

Three-dimensional integration of nanotechnologies for computing and data storage on a single chip

Max M. Shulaker et al.

NATURE (2017)

Add to Collection

Article Engineering, Electrical & Electronic

A Compact Virtual-Source Model for Carbon Nanotube FETs in the Sub-10-nm Regime-Part II: Extrinsic Elements, Performance Assessment, and Design Optimization

Chi-Shuen Lee et al.

IEEE TRANSACTIONS ON ELECTRON DEVICES (2015)

Add to Collection

Article Engineering, Electrical & Electronic

A Compact Virtual-Source Model for Carbon Nanotube FETs in the Sub-10-nm Regime-Part I: Intrinsic Elements

Chi-Shuen Lee et al.

IEEE TRANSACTIONS ON ELECTRON DEVICES (2015)

Add to Collection

Article Physics, Applied

Perpendicular-anisotropy magnetic tunnel junction switched by spin-Hall-assisted spin-transfer torque

Zhaohao Wang et al.

JOURNAL OF PHYSICS D-APPLIED PHYSICS (2015)

Add to Collection

© Peeref 2019-2024. All rights reserved.