4.6 Article

Solution-processable and photocurable aromatic polyurea gate dielectrics for high-performance organic thin-film transistors

Journal

MATERIALS RESEARCH BULLETIN
Volume 157, Issue -, Pages -

Publisher

PERGAMON-ELSEVIER SCIENCE LTD
DOI: 10.1016/j.materresbull.2022.112005

Keywords

Organic thin-film transistor; Polyurea; Photocurable; Polymer dielectric; Solution process

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A solution-processable and photocurable polyurea (PU) with excellent electrical and dielectric properties is synthesized and applied as a gate dielectric in high-performance organic thin-film transistors (OTFTs). The photo-crosslinked PU film improves dielectric properties and thermal and chemical resistance compared with pristine PU films. The performance of the c-PU thin film as a gate dielectric is demonstrated in DNTT-based and diketopyrrolopyrrole-thienothiophene copolymer-based OTFTs.
A solution-processable and photocurable polyurea (PU) with excellent electrical and dielectric properties is synthesized, characterized, and applied as a gate dielectric in high-performance organic thin-film transistors (OTFTs). The PU is synthesized from toluene-2,4-diisocyanate and 3,5-diaminobenzyl cinnamate via a conden-sation reaction. The PU containing cinnamoyl groups is photo-crosslinked without a photoinitiator and easily micropatterned by selective ultra-violet (UV) exposure. The photo-crosslinked PU (c-PU) film improves dielectric properties and thermal and chemical resistance compared with pristine PU films. We fabricated dinaphtho[2,3-b:2 ',3 '-f]thieno[3,2-b]thiophene (DNTT)-based OTFTs with a c-PU gate dielectric layer to investigate the per-formance of the c-PU thin film as a gate dielectric. The field-effect mobility and on/off ratio of DNTT-based OTFTs with surface-treated c-PU gate dielectric are 0.75 +/- 0.03 cm(2) V(-1 )s(-1 )and 1.60 x 10(6,) respectively. In addition, solution-processed diketopyrrolopyrrole-thienothiophene copolymer-based OTFTs with c-PU gate dielectric show field-effect mobility of 0.07 +/- 0.01 cm(2 )V(-1 )s(- 1) and on/off ratio of 2.88 x 10(5). Furthermore, the complementary inverter was successfully demonstrated by using c-PU with excellent insulating property as the gate dielectric.

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