4.8 Article

EMI Filter Design for the Integrated Dual Three-Phase Active Bridge (D3AB) PFC Rectifier

Journal

IEEE TRANSACTIONS ON POWER ELECTRONICS
Volume 37, Issue 12, Pages 14527-14546

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TPEL.2022.3195343

Keywords

Electromagnetic interference; Rectifiers; Inductors; Topology; Power harmonic filters; Ports (computers); Transformers; Ac-dc power converters; ac-side electromagnetic interference (EMI) filter design; dual three-phase active bridge converter (D3ABC) topology; electromagnetic compatibility

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This article presents a model for calculating the conducted EMI noise of a dual three-phase active bridge power factor correction (PFC) rectifier. Based on the model, an EMI filter is designed for the D3AB converter topology and validated through hardware prototype measurements. The experimental results show that the level of conducted EMI noise increases with increasing load on the secondary side, but the overall hardware prototype meets the required specifications.
A dual three-phase active bridge (D3AB) power factor correction (PFC) rectifier features two dc ports, i.e., one on the primary side, which is not isolated from the mains, and the second, which is galvanically isolated dc port on the secondary side. A model for calculating the conducted electromagnetic interference (EMI) noise of a 7.5-kW D3AB PFC rectifier operating from a 400 V_\mathrm{rms} line-to-line mains and generating dc output voltages of V_{\mathrm{dc,1}} = 800 V and V_{\mathrm{dc,2}} = 400 V is presented in this article. The EMI model takes into account the implications of the power levels provided at the primary- and secondary-side dc ports, i.e., P_{1} and P_{2}, respectively, on the conducted EMI noise and is used to design an EMI filter for a hardware prototype of the D3AB converter topology, which is volume-optimized for the considered specifications. The designed filter has a volume of 0.17\,\text{dm}<^>{3} = 10.\text{4}\;\text{ in}<^>{3} (0.09\text{ dm}<^>{3} = 5.5\text{ in}<^>{3} for the differential mode filter and 0.08\text{ dm}<^>{3} = 4.9\text{ in}<^>{3} for the common mode filter part). As part of the experimental verification of the model, the conducted EMI noise of the hardware prototype is measured under two different workload scenarios, i.e., P_{1} = \text{4}\;\text{ kW}, P_{2} = \text{2.5}\;\text{ kW} and P_{1} = 0, P_{2} = 6.5\text{ kW}. Measurements show that the level of conducted EMI noise increases with increasing load on the secondary side, which is consistent with the predictions of the noise model. The complete hardware prototype achieves sinusoidal mains currents with a power factor of \lambda = 0.994 and a total harmonic distortion of currents lower than 5.6\% at the considered loads and complies with the CISPR 11 class A quasi-peak conducted EMI limit.

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