A CMOS-Compatible Photonic Demodulator With Low-Power Consumption for Time-of-Flight Image Sensor

This article presents a CMOS-compatible low-power photonic demodulator for time-of-flight (ToF) CMOS image sensor. The proposed device called the junction-assisted photonic demodulator (JAPD) uses electric field applied through two guide electrodes to facilitate the collection of optically generated minority carriers but using a p-n junction to prevent direct majority carrier current. A prototype of the JAPD has been fabricated in a 0.18- $\mu $ m standard CMOS foundry process. Experimental results show that it can achieve a low-power consumption of 29 fW per pixel and a high modulation contrast (MC) of 98%. Through process optimization, it is shown that the optical window can be fully depleted during the demodulation process. In TCAD simulation, the frequency response can be significantly improved by ensuring full depletion of the optical window.

Automated summary

This article introduces a CMOS-compatible low-power photonic demodulator for ToF CMOS image sensors. The proposed junction-assisted photonic demodulator (JAPD) utilizes electric field applied through two guide electrodes to enhance the collection of optically generated minority carriers, while using a p-n junction to prevent direct majority carrier current. Experimental results demonstrate that the JAPD achieves a low power consumption of 29 fW per pixel and a high modulation contrast (MC) of 98%. Process optimization allows for the complete depletion of the optical window during the demodulation process, significantly improving the frequency response in TCAD simulation.