An Ultra-Efficient Approximate Multiplier With Error Compensation for Error-Resilient Applications

Approximate computing is a promising paradigm for trading off accuracy to improve hardware efficiency in error-resilient applications such as neural networks and image processing. This brief presents an ultra-efficient approximate multiplier with error compensation capability. The proposed multiplier considers the least significant half of the product a constant compensation term. The other half is calculated precisely to provide an ultra-efficient hardware-accuracy trade-off. Furthermore, a low-complexity but effective error compensation module (ECM) is presented, significantly improving accuracy. The proposed multiplier is simulated using HSPICE with 7nm tri-gate FinFET technology. The proposed design significantly improves the energy-delay product, on average, by 77% and 54% compared to the exact and existing approximate designs. Moreover, the proposed multiplier's accuracy and effectiveness in neural networks and image multiplication are evaluated using MATLAB simulations. The results indicate that the proposed multiplier offers high accuracy comparable to the exact multiplier in NNs and provides an average PSNR of more than 51dB in image multiplication. Accordingly, it can be an effective alternative for exact multipliers in practical error-resilient applications.

Automated summary

Approximate computing is a promising paradigm that offers improved hardware efficiency by trading off accuracy in error-resilient applications. This brief presents an ultra-efficient approximate multiplier with error compensation capability. The proposed multiplier considers a constant compensation term for the least significant half of the product, while the other half is calculated precisely to achieve an efficient hardware-accuracy trade-off. Additionally, a low-complexity but effective error compensation module is introduced to significantly improve accuracy.