4.7 Article

Ultra-Low-Power Low-Input-Voltage Charge Pump for Micro-Energy Harvesting Applications

Journal

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TCSI.2022.3217124

Keywords

Threshold voltage; Switching circuits; Logic gates; Switches; Transistors; Capacitors; Inverters; Charge pump; gate voltage boosting; low power; low voltage; subthreshold; switched capacitor DC-DC converter

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This paper presents a subthreshold input voltage charge pump based on the cross-coupled voltage doubler and boosted gate voltages for the transfer switches. A novel inverter architecture called negative low-state voltage inverter is proposed to generate clock signals for switching transistors and improve their drive capability. Experimental characterization of silicon prototypes in 180 nm CMOS technology demonstrates that the proposed scheme can pump charge from an input voltage as low as 110 mV, with a peak efficiency above 70% for input voltages between 180 mV and 400 mV and input power levels ranging from 45 nW to 25 mu W, suitable for miniaturized transducers on chip.
A subthreshold input voltage charge pump based on the well-known cross-coupled voltage doubler and using boosted gate voltages for the transfer switches is presented. A level shifter and some inverters, including a novel inverter architecture proposed in this work and referred to as negative low-state voltage inverter, are used to generate the clock signals for the switching transistors with the purpose of significantly improving their drive capability. A complete analysis of the proposed charge pump is provided to highlight the advantages of the implemented structure, revealing the power efficiency improvement when the input voltage is below the threshold voltage of the transistors. An extensive experimental characterization of silicon prototypes in 180 nm CMOS technology was carried out, showing that the proposed scheme is able to pump charge from an input voltage as low as 110 mV. The experimental peak efficiency remains above 70% for input voltages between 180 mV and 400 mV and input power levels from 45 nW to 25 mu W, which are appropriate for different miniaturized transducers implementable on chip.

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