4.6 Article

Low voltage AC electroluminescence in silicon MOS capacitors

Journal

APPLIED PHYSICS LETTERS
Volume 121, Issue 19, Pages -

Publisher

AIP Publishing
DOI: 10.1063/5.0120507

Keywords

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Funding

  1. U.S. Department of Energy, Office of Science, Office of Basic Energy Sciences, Materials Sciences and Engineering Division [DE-AC02-05-CH11231, KC1201]
  2. Postdoctoral Fellowships for Research Abroad of the Japan Society for the Promotion of Science

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Low power silicon based light source and detector are attractive for on-chip photonic circuits. However, conventional silicon light emitting diodes have limited responsivity for silicon photodetectors, and previous hot carrier electroluminescent silicon devices require high operating voltages. In this study, we investigated hot carrier electroluminescence in silicon metal-oxide-semiconductor capacitors operating under transient voltage conditions, and achieved low voltage operation by utilizing appropriate voltage transients.
Low power silicon based light source and detector are attractive for on-chip photonic circuits given their ease of process integration. However, conventional silicon light emitting diodes emit photons with energies near the band edge where the corresponding silicon photodetectors lack responsivity. On the other hand, previously reported hot carrier electroluminescent silicon devices utilizing a reverse biased diode require high operating voltages. Here, we investigate hot carrier electroluminescence in silicon metal-oxide-semiconductor capacitors operating under transient voltage conditions. During each voltage transient, large energy band bending is created at the edge of the source contact, much larger than what is achievable at a steady state. As a result, electrons and holes are injected efficiently from a single source contact into the silicon channel at the corresponding voltage transient, where they subsequently undergo impact ionization and phonon-assisted interband recombination. Notably, we show low voltage operation down to 2.8 V by using a 20 nm thick high- kappa gate dielectric. We show further voltage scaling is possible by reducing the gate dielectric thickness, thus presenting a low voltage platform for silicon optoelectronic integrated circuits. Published under an exclusive license by AIP Publishing.

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