A Gate Programmable van der Waals Metal-Ferroelectric-Semiconductor Vertical Heterojunction Memory

Ferroelectricity, one of the keys to realize non-volatile memories owing to the remanent electric polarization, is an emerging phenomenon in the 2D limit. Yet the demonstrations of van der Waals (vdW) memories using 2D ferroelectric materials as an ingredient are very limited. Especially, gate-tunable ferroelectric vdW memristive device, which holds promises in future multi-bit data storage applications, remains challenging. Here, a gate-programmable multi-state memory is shown by vertically assembling graphite, CuInP2S6, and MoS2 layers into a metal(M)-ferroelectric(FE)-semiconductor(S) architecture. The resulted devices seamlessly integrate the functionality of both FE-memristor (with ON-OFF ratios exceeding 10(5) and long-term retention) and metal-oxide-semiconductor field effect transistor (MOS-FET). Thus, it yields a prototype of gate tunable giant electroresistance with multi-levelled ON-states in the FE-memristor in the vertical vdW assembly. First-principles calculations further reveal that such behaviors originate from the specific band alignment between the FE-S interface. Our findings pave the way for the engineering of ferroelectricity-mediated memories in future implementations of 2D nanoelectronics.

Automated summary

This study successfully demonstrated a gate-programmable non-volatile memory by vertically assembling graphite, CuInP2S6, and MoS2 layers into a metal-ferroelectric-semiconductor (M-FE-S) architecture. The resulting devices integrate the functionalities of both ferroelectric memristor (FE-memristor) and metal-oxide-semiconductor field-effect transistor (MOS-FET), enabling gate-tunable giant electroresistance with multi-level ON-states in the FE-memristor. First-principles calculations revealed that this behavior originates from the specific band alignment at the FE-S interface. These findings pave the way for engineering ferroelectricity-mediated memories in future implementations of 2D nanoelectronics.