4.8 Article

Probing Intrinsic Defect-Induced Trap States and Hopping Transport in Two-Dimensional PdSe2 Semiconductor Devices

Journal

ACS APPLIED MATERIALS & INTERFACES
Volume 14, Issue 50, Pages 55787-55794

Publisher

AMER CHEMICAL SOC
DOI: 10.1021/acsami.2c17821

Keywords

palladium diselenide; h-BN; PdSe2 heterostructure; intrinsic defects; trap state; hopping transport; metal-insulator-semiconductor-metal capacitor; field-effect transistor

Funding

  1. Global Research Laboratory (GRL) Program [2016K1A1A2912707]
  2. National Research Foundation of Korea (NRF) [2021R1A2C2010869]
  3. National Research Foundation of Korea [2021R1A2C2010869] Funding Source: Korea Institute of Science & Technology Information (KISTI), National Science & Technology Information Service (NTIS)

Ask authors/readers for more resources

This study investigates the trap states induced by Se vacancies and their influence on hopping transport in PdSe2. The results show that trap states in few-layer PdSe2 are more temperature-dependent, while those in multilayer PdSe2 show no significant temperature dependence. The electron mobility is higher in multilayer PdSe2, possibly due to the decreased effective mass and suppression of charge impurity scattering. The hopping transport mechanism is strongly associated with the Se vacancy-induced localized states with poor screening and strong potential fluctuations.
Palladium diselenide (PdSe2), as an emerging twodimensional (2D) layered material, is gaining growing attention in nanoelectronics and optoelectronics due to its thickness-dependent band gap, high carrier mobility, and good air stability. However, its asymmetric pentagon structure is inclined to breed defects. Herein, the intrinsic Se vacancy-induced trap states and their influence on the hopping transport in PdSe2 are systematically investigated. We provide direct evidence that Se vacancies exist in the fresh PdSe2 samples, which results in the localized trapping states inside the band gap. For the few-layer PdSe2, at 77 K, the trap density (Dit) near the midgap is about 2.2 x 1013 cm-2 eV-1, whereas at 295 K, the Dit value increases to -7.1 x 1013 cm-2 eV-1. By comparison, the multilayer PdSe2 shows nonobvious temperature-dependent trap behaviors with almost unchanged Dit values of -8.1 x 1012 cm-2 eV-1 at midgap in the temperature range between 77 and 295 K. Thus, trap states in the few-layer PdSe2 are more vulnerable to temperature effect. Transport measurements demonstrated that both few-layer and multilayer PdSe2 field-effect transistor (FET) devices show n-type dominant ambipolar behaviors. The electron mobility in the multilayer PdSe2 FET is nearly 15-fold higher than that in the few-layer PdSe2 FET at 315 K, probably owing to the decreased effective mass and suppression of charge impurity scattering in the thicker channel material. However, both FET devices exhibit variable-range hopping over a temperature range from 77 to 240 K and thermally activated hopping at temperatures above 240 K. The hopping transport mechanism is strongly associated with the Se vacancy-induced localized states with poor screening and strong potential fluctuations. This study reveals the important role of structural defects in tailoring and improving the charge transport properties of PdSe2.

Authors

I am an author on this paper
Click your name to claim this paper and add it to your profile.

Reviews

Primary Rating

4.8
Not enough ratings

Secondary Ratings

Novelty
-
Significance
-
Scientific rigor
-
Rate this paper

Recommended

No Data Available
No Data Available