4.6 Review

Heterogeneous and Monolithic 3D Integration Technology for Mixed-Signal ICs

Journal

ELECTRONICS
Volume 11, Issue 19, Pages -

Publisher

MDPI
DOI: 10.3390/electronics11193013

Keywords

heterogeneous integration; monolithic 3D; sequential 3D; wafer bonding; RF application; image sensor; mixed-signal IC; system-on-chip

Funding

  1. NRF of Korea [2022M3F3A2A01065057, 2022M3I8A107725711, 2020M3F3A2A02082450, 2020M3F3A2A01082329]
  2. NNFC OI LAB Project
  3. BrainKorea 21 (BK21) FOUR
  4. System Semiconductor Development Program - Gyeonggi-do

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Heterogeneous and monolithic 3D (M3D) integration using advanced Si CMOS technology has gained significant interest for next-generation system-on-chips (SoCs) in diverse applications. This paper presents recent progress in the fabrication of III-V devices on Si bottom devices/circuits, focusing on RF and imaging devices. Successful integration of high-performance InGaAs HEMTs on the bottom ICs without substrate noise and the reduction of thermal interaction through the use of an intermediate metal plate have been achieved. The monolithic integration of InGaAs photodetectors on Si bottom devices without thermal damage has also been demonstrated.
For next-generation system-on-chips (SoCs) in diverse applications (RF, sensor, display, etc.) which require high-performance, small form factors, and low power consumption, heterogeneous and monolithic 3D (M3D) integration employing advanced Si CMOS technology has been intriguing. To realize the M3D-based systems, it is important to take into account the relationship between the top and bottom devices in terms of thermal budget, electrical coupling, and operability when using different materials and various processes during integration and sequential fabrication. In this paper, from this perspective, we present our recent progress of III-V devices on Si bottom devices/circuits for providing informative guidelines in RF and imaging devices. Successful fabrication of the high-performance InGaAs high electron mobility transistors (HEMTs) on the bottom ICs, with a high unity current gain cutoff frequency (f(T)) and unity power gain cutoff frequency (f(MAX)) was accomplished without substrate noise. Furthermore, the insertion of an intermediate metal plate between the top and bottom devices reduced the thermal interaction. Furthermore, the InGaAs photodetectors (PDs) were monolithically integrated on Si bottom devices without thermal damage due to low process temperature. Based on the integrated devices, we successfully evaluated the device scalability using sequential fabrication and basic readout functions of integrated circuits.

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