Hardware Acceleration of Identifying Barcodes in Multiplexed Nanopore Sequencing

In multiplexed sequencing, the identification of DNA sequencing barcodes can effectively reduce the probability of sample misassignment. However, the great quantity of sequence data requires a high-throughput identification method. Therefore, based on a barcode identification scheme combining cyclic shifting with dynamic programming (DP), this paper proposes, implements and tests a hardware accelerator that can accelerate barcode identification. In the accelerator, considering that the computational complexity of the DP algorithm can be expressed as the multiplication of the lengths of both involved sequences, we design a systolic array structure with simplified processing element (PE) and a parallel circuit architecture to identify the insertion and deletion errors based on the traceback. The accelerator is implemented on a field-programmable gate array (FPGA), and its performance is compared with that of software implemented on a general-purpose computer. The experimental results indicate that, compared with the software implementation, the accelerator can achieve speedups of two orders of magnitude for longer barcodes.

Automated summary

This paper proposes a hardware accelerator for accelerating the recognition of DNA sequencing barcodes using a barcode identification scheme combining cyclic shifting with dynamic programming. The experimental results demonstrate that the accelerator can achieve a speedup of two orders of magnitude for longer barcodes.