4.7 Article

A Novel 17-Level Reduced Component Single DC Switched-Capacitor-Based Inverter With Reduced Input Spike Current

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/JESTPE.2022.3166222

Keywords

Capacitors; Inverters; Topology; Switches; Voltage control; Voltage; Semiconductor diodes; 17-level (17L); peak inverse voltage (PIV); phase disposition pulsewidth modulation (PD-PWM); switched capacitor (SC); multilevel inverter (SC-MLI); single stage

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This article introduces a design scheme using a 17-level switching capacitor inverter, which requires fewer power electronic switches and components. It features automatic voltage balancing and significantly improved capacitor life expectancy.
Multilevel inverters (MLIs) have become common and resourceful as a result of the fast advancement of technology in the areas of high-voltage and high-power applications, among other things. Recently, MLIs have received a great deal of attention recently, due to the growing need to harness environmentally friendly energy. With reduced power electronics switches, diodes, and a voltage boost gain factor of 8, this article presents a single-phase 17-level switching capacitor inverter design. The proposed inverter uses single dc voltage source, two diodes, 14 power electronics switches, and three capacitors. The different mode of operation of topology is explained in detail, including their self-voltage balancing technique. Additionally, an inductor is used in the capacitor charging loop to avoid current spikes caused by the input dc source while charging the capacitor quickly, thereby increasing capacitor life expectancy significantly. Compared to previously the proposed single-input MLIs, the proposed inverter has a lower semiconductor switch count and a lower cost function value that are its distinguished feature. The performance of the topology is verified by MATLAB/Simulink, and furthermore, a laboratory prototype is utilized, which confirms the feasibility of the proposed topology.

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